STM8S903K3 STMicroelectronics, STM8S903K3 Datasheet - Page 81

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STM8S903K3

Manufacturer Part Number
STM8S903K3
Description
16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, 1 Kbyte RAM, 640 bytes EEPROM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8S903K3

Program Memory
8 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
Data Memory
640 bytes true data EEPROM; endurance 300 kcycles
Ram
1 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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STM8S903K3 STM8S903F3
10.3.8
The reset network shown in the following figure protects the device against parasitic resets.
The user must ensure that the level on the NRST pin can go below V
I/O static characteristics
For power consumption sensitive applications, the external reset capacitor value can be
reduced to limit the charge/discharge current. If NRST signal is used to reset external circuitry,
attention must be taken to the charge/discharge time of the external capacitor to fulfill the
external devices reset timing conditions. Minimum recommended capacity is 100 nF.
SPI serial peripheral interface
Unless otherwise specified, the parameters given in the following table are derived from tests
performed under ambient temperature, f
t
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (NSS, SCK, MOSI, MISO).
MASTER
= 1/f
Figure 37: Typical NRST pull-up current vs V
(optional)
External
MASTER
circuit
reset
.
Figure 38: Recommended reset pin protection
), otherwise the reset is not taken into account internally.
0.1 F
DocID15590 Rev 6
NRST
MASTER
VDD
RPU
frequency and V
Filter
DD
@ 4 temperatures
DD
Electrical characteristics
supply voltage conditions.
Internal reset
IL
max. (see
STM8
Table 40:
81/115

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