PHK04P02T NXP Semiconductors, PHK04P02T Datasheet - Page 6

Logic level P-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using vertical D-MOS technology

PHK04P02T

Manufacturer Part Number
PHK04P02T
Description
Logic level P-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using vertical D-MOS technology
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PHK04P02T
Product data sheet
Fig 5.
Fig 7.
Fig 9.
(A)
(A)
I
I
D
D
1.6
1.4
1.2
1.0
0.8
0.6
a
−5
−4
−3
−2
−1
−5
−4
−3
−2
−1
0
0
function of drain-source voltage; typical values
function of gate-source voltage; typical values
factor as a function of junction temperature
T
Output characteristics: drain current as a
V
Transfer characteristics: drain current as a
Normalized drain-source on-state resistance
0
0
0
j
DS
= 25 °C
> I
D
x R
−0.5
−0.5
V
DSon
GS
50
= −4.5 V
−4.5
−2.5
−1.8
−1.0
−1.0
T
j
= 25 °C
−2.5 V
100
V
GS
−1.5
−1.5
−1.8 V
(V) = −0.8
T
T
All information provided in this document is subject to legal disclaimers.
j
V
j
V
001aam077
001aam079
001aam081
= 150 °C
(°C)
GS
DS
−1.3
−1.2
−1.1
−1.0
−0.9
(V)
(V)
Rev. 02 — 14 December 2010
−2.0
−2.0
150
Fig 6.
Fig 8.
Fig 10. Gate-source threshold voltage as a function of
R
DS(on)
(Ω)
V
GS(th)
(S)
(V)
g
fs
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.8
0.6
0.4
0.2
0
8
6
4
2
0
0
of drain current; typical values
drain current; typical values
junction temperature
T
Drain-source on-state resistance as a function
V
Forward transconductance as a function of
I
0
0
0
D
j
DS
−0.8
= 25 °C
= 1 mA; V
P-channel vertical D-MOS logic level FET
> I
−0.9
D
−1
x R
−1.0
DSon
DS
−0.8
50
−1.1
= V
−2
GS
−1.2
minimum
typical
PHK04P02T
−3
−1.6
100
V
−1.8
−2.5
−4.5
GS
T
(V) = −1.3
T
© NXP B.V. 2010. All rights reserved.
j
T
−4
j
I
= 150 °C
D
j
001aam078
001aam080
= 25 °C
001aam082
(°C)
(A)
I
D
(A)
−2.4
150
−5
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