LPC2290 NXP Semiconductors, LPC2290 Datasheet - Page 14

• Manufacturer Part Number: LPC2290
• Description: The LPC2290 microcontroller is based on a 16/32-bit ARM7TDMI-S CPU with real-timeemulation and embedded trace support
• Manufacturer: NXP Semiconductors

NXP Semiconductors
6. Functional description
LPC2290_3
Product data sheet
6.1 Architectural overview
6.2 On-chip SRAM
6.3 Memory map
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM architecture is based on RISC
principles, and the instruction set and related decode mechanism are much simpler than
those of microprogrammed CISC. This simplicity results in a high instruction throughput
and impressive real-time interrupt response from a small and cost-effective processor
core.
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
The key idea behind Thumb is that of a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
The Thumb set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because Thumb code
operates on the same 32-bit register set as ARM code.
Thumb code is able to provide up to 65 % of the code size of ARM, and 160 % of the
performance of an equivalent ARM processor connected to a 16-bit memory system.
On-chip SRAM may be used for code and/or data storage. The SRAM may be accessed
as 8-bit, 16-bit, and 32-bit. The LPC2290 provides 16 kB of SRAM and the LPC2290/01
provides 64 kB of SRAM.
The LPC2290 memory maps incorporate several distinct regions, as shown in
In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either
on-chip bootloader, external memory BANK0 or on-chip static RAM. This is described in
Section 6.18 “System
•
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The standard 32-bit ARM set.
A 16-bit Thumb set.
Rev. 03 — 16 November 2006
control”.
16/32-bit ARM microcontroller with external memory interface
LPC2290
© NXP B.V. 2006. All rights reserved.
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