LPC1343FHN33 NXP Semiconductors, LPC1343FHN33 Datasheet - Page 45
![The LPC1343FHN33 is a ARM Cortex-M3 based microcontroller for embedded applications featuring a high level of integration and low power consumption](/photos/41/52/415284/sot865-3_3d_sml.gif)
LPC1343FHN33
Manufacturer Part Number
LPC1343FHN33
Description
The LPC1343FHN33 is a ARM Cortex-M3 based microcontroller for embedded applications featuring a high level of integration and low power consumption
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1311FHN33.pdf
(73 pages)
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NXP Semiconductors
Table 11.
LPC1311_13_42_43
Product data sheet
Peripheral
GPIO
IOCONFIG
I2C
ROM
SSP0
SSP1
UART
WDT
USB
USB
Power consumption for individual analog and digital blocks
9.6 Electrical pin characteristics
Typical supply current in mA
n/a
-
-
-
-
-
-
-
-
-
-
Fig 19. High-drive output: Typical HIGH-level output voltage V
12 MHz
0.21
0.00
0.03
0.04
0.11
0.11
0.20
0.01
-
1.84
V
(V)
OH
3.6
3.2
2.8
2.4
Conditions: V
output current I
2
0
0.80
0.05
3.91
48 MHz
0.02
0.12
0.15
0.41
0.41
0.76
4.19
All information provided in this document is subject to legal disclaimers.
DD
10
= 3.3 V; on pin PIO0_7.
Rev. 4 — 20 June 2011
72 MHz
1.17
0.02
0.17
0.22
0.60
0.60
1.11
0.08
-
5.71
OH
T = 85 °C
.
−40 °C
25 °C
20
Notes
GPIO pins configured as outputs and set to LOW. Direction
and pin state are maintained if the GPIO is disabled in the
SYSAHBCLKCFG register.
On LPC1313FBD48/01 only.
Main clock selected as clock source for the WDT.
Main clock selected as clock source for the USB. USB_DP
and USB_DM pulled LOW externally.
Dedicated USB PLL selected as cock source for the USB.
USB_DP and USB_DM pulled LOW externally.
30
…continued
32-bit ARM Cortex-M3 microcontroller
LPC1311/13/42/43
40
OH
versus HIGH-level
50
I
OH
002aae990
© NXP B.V. 2011. All rights reserved.
(mA)
60
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