LPC1343FHN33 NXP Semiconductors, LPC1343FHN33 Datasheet - Page 10

The LPC1343FHN33 is a ARM Cortex-M3 based microcontroller for embedded applications featuring a high level of integration and low power consumption

LPC1343FHN33

Manufacturer Part Number
LPC1343FHN33
Description
The LPC1343FHN33 is a ARM Cortex-M3 based microcontroller for embedded applications featuring a high level of integration and low power consumption
Manufacturer
NXP Semiconductors
Datasheet

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Table 3.
LPC1311_13_42_43
Product data sheet
Symbol
RESET/PIO0_0
PIO0_1/CLKOUT/
CT32B0_MAT2/
USB_FTOGGLE
PIO0_2/SSEL0/
CT16B0_CAP0
PIO0_3/USB_VBUS
PIO0_4/SCL
PIO0_5/SDA
PIO0_6/
USB_CONNECT/
SCK0
PIO0_7/CTS
PIO0_8/MISO0/
CT16B0_MAT0
LPC1313/42/43 LQFP48 pin description table
6.2 Pin description
Pin
3
4
10
14
15
16
22
23
27
[2]
[3]
[3]
[3]
[4]
[4]
[3]
[3]
[3]
Start
logic
input
yes
yes
yes
yes
yes
yes
yes
yes
yes
Type Reset
I
I/O
I/O
O
O
O
I/O
I/O
I
I/O
I
I/O
I/O
I/O
I/O
I/O
O
I/O
I/O
I
I/O
I/O
O
All information provided in this document is subject to legal disclaimers.
state
[1]
I; PU
-
I; PU
-
-
-
I; PU
-
-
I; PU
-
I; IA
-
I; IA
-
I; PU
-
-
I; PU
-
I; PU
-
-
Rev. 4 — 20 June 2011
Description
RESET — External reset input with 20 ns glitch filter. A LOW-going
pulse as short as 50 ns on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0.
PIO0_0 — General purpose digital input/output pin with 10 ns glitch
filter.
PIO0_1 — General purpose digital input/output pin. A LOW level on
this pin during reset starts the ISP command handler or the USB
device enumeration (USB on LPC1342/43 only, see description of
PIO0_3).
CLKOUT — Clockout pin.
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
USB_FTOGGLE — USB 1 ms Start-of-Frame signal (LPC1342/43
only).
PIO0_2 — General purpose digital input/output pin.
SSEL0 — Slave select for SSP0.
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_3 — General purpose digital input/output pin. LPC1342/43
only: A LOW level on this pin during reset starts the ISP command
handler, a HIGH level starts the USB device enumeration.
USB_VBUS — Monitors the presence of USB bus power
(LPC1342/43 only).
PIO0_4 — General purpose digital input/output pin (open-drain).
SCL — I
only if I
register.
PIO0_5 — General purpose digital input/output pin (open-drain).
SDA — I
only if I
register.
PIO0_6 — General purpose digital input/output pin.
USB_CONNECT — Signal used to switch an external 1.5 k
resistor under software control. Used with the SoftConnect USB
feature (LPC1342/43 only).
SCK0 — Serial clock for SSP0.
PIO0_7 — General purpose digital input/output pin (high-current
output driver).
CTS — Clear To Send input for UART.
PIO0_8 — General purpose digital input/output pin.
MISO0 — Master In Slave Out for SSP0.
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
2
2
C Fast-mode Plus is selected in the I/O configuration
C Fast-mode Plus is selected in the I/O configuration
2
2
C-bus clock input/output (open-drain). High-current sink
C-bus data input/output (open-drain). High-current sink
32-bit ARM Cortex-M3 microcontroller
LPC1311/13/42/43
© NXP B.V. 2011. All rights reserved.
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