ADP1875 Analog Devices, ADP1875 Datasheet - Page 25

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ADP1875

Manufacturer Part Number
ADP1875
Description
Synchronous Buck Controller with Constant On-Time, Valley Current Mode, and Power Saving Mode
Manufacturer
Analog Devices
Datasheet
VOLTAGE TRACKING
The ADP1874/ADP1875 feature a voltage-tracking function that
facilitates proper power-up sequencing in applications that require
tracking a master voltage. In this manner, the user is free to
impose a master voltage that typically comes with a selectable
or programmable ramp rate on slave or secondary power rails.
To impose any voltage tracking relationship, the master voltage
rise time must be longer than the slave voltage soft start period.
This is particularly important in applications such as I/O voltage
sequencing and core voltage applications where specific power
sequencing is required.
Tracking is made possible by four inputs to the error amplifier,
three of which are input pins to the IC. The TRACK and SS pins
are positive inputs, and the FB pin provides the negative feedback
from the output voltage via the divider network. The fourth input
to the amplifier is the reference voltage of 0.6 V. The negative
feedback pin (FB pin) regulates the output voltage to the lowest
of the three positive inputs (TRACK, SS, and 0.6 V reference).
In all tracking configurations, the slave output can be set to as
low as 0.6 V for a given operating condition. The master voltage
must have a longer rise time than the slaves programmed soft
start period; otherwise, the tracking relationship will not be
observed at the slave output.
Figure 80. Power Good Timing Diagram, t
1.2V V
1.2V V
PGOOD
OUT2 (SLAVE)
OUT2 (SLAVE)
FB
R
R
1kΩ
1kΩ
TOP2
TOP2
VREG
VREG
0V
0V
690mV
640mV
600mV
530mV
R
1kΩ
R
1kΩ
Figure 82. Ratiometric Tracking Circuit Implementation
Figure 81. Coincident Tracking Circuit Implementation
BOT2
BOT2
10kΩ
10kΩ
SOFT-START
V EXT
EN
FB
GND
EN
FB
GND
HYSTERESIS (50mV)
PGD
SLAVE
SLAVE
PGND
PGND
t
PGD
= 12 μs (Diagram May Look Disproportionate for Illustration Purposes.)
PGOOD
PGOOD
TRACK
TRACK
PGOOD
ASSERTION
AT POWER-UP
Rev. 0 | Page 25 of 44
SS
SS
t
PGD
R
R
PGD
PGD
0.9V
1.7V
R
1kΩ
R
1kΩ
C
C
TRK1
TRK1
SS
SS
2.5V V
1.8V V
R
R
Coincident and ratiometric tracking are two possible tracking
configuration options offered by the ADP1874/ADP1875.
Coincident tracking is the most commonly used tracking
technique. It is primarily used in core and I/O sequencing
applications. The ramp rate of the master voltage is fully
imposed onto the ramp rate of the slave output voltage until it
has reached its regulation setpoint. Connecting the TRACK pin,
by differentially tapping onto the master voltage via a resistive
divider of similar ratio to the slave feedback divider network,
is depicted in Figure 83.
500Ω
1kΩ
TRK2
TRK2
V
V
Figure 83. Coincident Tracking: Master Voltage—Slave Voltage Tracking
EXT
EXT
OUT1 (MASTER)
OUT1 (MASTER)
OUTPUT OVERVOLTAGE
PGOOD DEASSERT
AT POWER DOWN
PGOOD
REASSERT
t
DEASSERTION
PGD
R
R
TOP1
TOP1
VREG
VREG
t
PGOOD
PGD
R
R
BOT1
BOT1
10kΩ
10kΩ
MASTER
MASTER
EN
FB
GND
EN
FB
GND
MASTER VOLTAGE
PGND
PGND
SLAVE VOLTAGE
Relationship
TIME (ms)
ADP1874/ADP1875

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