AD9864 Analog Devices, AD9864 Datasheet - Page 8

• Manufacturer Part Number: AD9864
• Description: IF Digitizing Subsystem
• Manufacturer: Analog Devices

Specifications of AD9864

• Resolution (bits): 24bit
• # Chan: 1
• Sample Rate: 18MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni,SE-Uni
• Adc Architecture: Sigma-Delta
• Pkg Type: CSP

AD9864
PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
Table 5. Pin Function Descriptions—48-Lead Lead Frame Chip Scale Package (LFCSP)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
GCN
VREFP
VDDQ
VDDC
GNDC
GNDD
VDDD
Mnemonic
MXOP
MXON
GNDF
IF2N
IF2P
VDDF
GCP
VDDA
GNDA
VREFN
RREF
IOUTC
GNDQ
CLKP
CLKN
GNDS
PC
PD
PE
Description
Mixer Output, Positive
Mixer Output, Negative
Ground for Front End of ADC
Second IF Input (to ADC), Negative
Second IF Input (to ADC), Positive
Positive Supply for Front End of ADC
Filter Capacitor for ADC Full-Scale
Control
Full-Scale Control Ground
Positive Supply for ADC Back End
Ground for ADC Back End
Voltage Reference, Positive
Voltage Reference, Negative
Reference Resistor: Requires 100 kΩ to
GNDA
Positive Supply for Clock Synthesizer
Clock Synth Charge Pump Out Current
Ground for Clock Synthesizer Charge
Pump
Positive Supply for Clock Synthesizer
Ground for Clock Synthesizer
Sampling Clock Input/Clock VCO Tank,
Positive
Sampling Clock Input/Clock VCO Tank,
Negative
Substrate Ground
Ground for Digital Functions
Clock Input for SPI Port
Data I/O for SPI Port
Enable Input for SPI Port
Positive Supply for Internal Digital
Figure 2. 48-Lead LFCSP, Backside Paddle Contact Is Connected to Ground
VREFP
VREFN
MXOP
MXON
GNDA
GNDF
VDDA
VDDF
IF2N
GCP
GCN
IF2P
10
11
12
1
2
3
4
5
6
8
9
7
48
13
PIN 1
IDENTIFIER
47
14
46
15
45
16
Rev. 0 | Page 8 of 44
(Not to Scale)
44
17
AD9864
TOP VIEW
43
18
42
19
41
20
40
21
Pin No.
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
39
22
38
23
37
24
36
35
34
33
32
31
30
29
28
27
26
25
Mnemonic
VDDH
CLKOUT
DOUTA
DOUTB
FS
GNDH
SYNCB
GNDS
FREF
GNDL
GNDP
IOUTL
VDDP
VDDL
CXVM
LON
LOP
CXVL
GNDI
CXIF
IFIN
VDDI
GNDL
FREF
GNDS
SYNCB
GNDH
FS
DOUTB
DOUTA
CLKOUT
VDDH
VDDD
PE
Description
Positive Supply for Digital Interface
Clock Output for SSI Port
Data Output for SSI Port
Data Output for SSI Port (Inverted) or
SPI Port
Frame Sync for SSI Port
Ground for Digital Interface
Resets SSI and DecimatorCounters;
Active Low
Substrate Ground
Reference Frequency Input for Both
Synthesizers
Ground for LO Synthesizer
Ground for LO Synthesizer Charge
Pump
LO Synthesizer Charge Pump Out
Current
Positive Supply for LO Synthesizer
Charge Pump
Postive Supply for LO Synthesizer
External Filter Capacitor; DC Output of
LNA
LO Input to Mixer and LO Synthesizer,
Negative
LO Input to Mixer and LO Synthesizer,
Positive
External Bypass Capacitor for LNA
Power Supply
Ground for Mixer and LNA
External Capacitor for Mixer V-I
Converter Bias
First IF Input (to LNA)
Positive Supply for LNA and Mixer