AD9864 Analog Devices, AD9864 Datasheet - Page 34

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AD9864

Manufacturer Part Number
AD9864
Description
IF Digitizing Subsystem
Manufacturer
Analog Devices
Datasheet

Specifications of AD9864

Resolution (bits)
24bit
# Chan
1
Sample Rate
18MSPS
Interface
Ser,SPI
Analog Input Type
Diff-Uni,SE-Uni
Adc Architecture
Sigma-Delta
Pkg Type
CSP

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AD9864
option, the use of 24-bit data is preferable to using the DVGA.
Table 17 indicates which AGCA values are reasonable for
various decimation factors. The white cells indicate that the
(decimation factor/AGCA) combination works well; the light gray
cells indicate ringing and an increase in the AGC settling time; and
the dark gray cells indicate that the combination results in instability
or near instability in the AGC loop. Setting AGCF = 1 improves th
time-domain behavior at the expense of increased spectral spreading.
Table 17. AGCA Limits if the DVGA Is Enabled
Finally, consider the case of a strong out-of-band interferer
(i.e., –18 dBm to –32 dBm for matched IF input) that is larger
than the target signal and large enough to be tracked by the
control loop based on the output of the DEC1. The ability of
the control loop to track this interferer and set the VGA
attenuation to prevent clipping of the ADC is limited by the
accuracy of the digital signal estimation occurring at the output
of DEC1. The accuracy of the digital signal estimation is a
function of the frequency offset of the out-of-band interferer
relative to the IF frequency as shown in Figure 60. Interferers at
increasingly higher frequency offsets incur larger measurement
errors, potentially causing the control loop to inadvertently
reduce the amount of VGA attenuation that may result in clip-
ping of the ADC. Figure 63 shows the maximum measured
interferer signal level versus the normalized IF offset frequency
(relative to f
mum target input signal level (0 dBFS = –18 dBm). Note that
the increase in allowable interferer level occurring beyond
0.04 × f
by the ADC’s signal transfer function.
60
120
300
540
900
CLK
results from the inherent signal attenuation provided
CLK
M
0
1
4
8
E
) tolerated by the AD9864 relative to its maxi-
AGCA
4
5
6
7
8
9
10 11 12 13 14 15
Rev. 0 | Page 34 of 44
e
Table 18. SPI Registers Associated with AGC
Address
(Hex)
0x03
0x04
0x05
0x06
SYSTEM NOISE FIGURE (NF) VERSUS VGA (OR
AGC) CONTROL
The AD9864’s system noise figure is a function of the ACG
attenuation and output signal bandwidth. Figure 64 plots the
nominal system NF as a function of the AGC attenuation for
both narrow-band (20 kHz) and wideband (150 kHz) modes
with f
would be observed at the output for a –2 dBFS input. The high
dynamic range of the ADC within the AD9864 ensures that the
system NF increases gradually as the AGC attenuation is
increased. In narrow-band (BW = 20 kHz) mode, the system
noise figure increases by less than 3 dB over a 12 dB AGC
range, while in wideband (BW = 150 kHz) mode, the degrada-
tion is about 5 dB. As a result, the highest instantaneous
dynamic range for the AD9864 occurs with 12 dB of AGC
attenuation, since the AD9864 can accommodate an additional
12 dB peak signal level with only a moderate increase in its
noise floor.
As Figure 64 shows, the AD9864 can achieve an SNR in excess
of 100 dB in narrow-band applications. To realize the full
performance of the AD9864 in such applications, it is recom-
mended that the I/Q data be represented with 24 bits. If 16-bit
–12
–15
–3
–6
–9
CLK
0
0
= 18 MHz. Also shown on the plot is the SNR that
Figure 63. Maximum Interferer (or Blocker) Input Level
NORMALIZED FREQUENCY OFFSET = (
Bit
Breakdown
(7)
(6:0)
(7:4)
(3:0)
(7)
(6:4)
(3)
(2:0)
(7:0)
0.01
vs. Normalized IF Frequency Offset
0.02
Width
1
7
8
4
4
1
3
1
3
0.03
Default
Value
0
0x00
0x00
0
0x00
0
0
0
0
f
IN
0.04
f
IF
)/
f
CLK
Name
ATTEN
AGCG (14:8)
AGCG (7:0)
AGCA
AGCO
AGCV
AGCO
AGCF
AGCR
0.05

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