AD7329 Analog Devices, AD7329 Datasheet - Page 27

• Manufacturer Part Number: AD7329
• Description: 1 MSPS , 8-Channel, Software Selectable True Bipolar Input, 12-Bit Plus Sign A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7329

• Resolution (bits): 13bit
• # Chan: 8
• Sample Rate: 1MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni,SE-Uni
• Ain Range: Bip (Vref),Bip (Vref) x 2,Bip (Vref) x 4,Bip 10V,Bip 2.5V,Bip 5.0V,Uni (Vref),Uni 10V
• Adc Architecture: SAR
• Pkg Type: SOP

Table 13. Power Mode Selection
PM1
1
1
0
0
Table 14. Sequencer Selection
SEQ1
0
0
1
1
PM0
1
0
1
0
SEQ2
0
1
0
1
Description
Full shutdown mode. In this mode, all internal circuitry on the AD7329 is powered down. Information in the control register
is retained when the AD7329 is in full shutdown mode.
Autoshutdown mode. The AD7329 enters autoshutdown on the 15
All internal circuitry is powered down in autoshutdown.
Autostandby mode. In this mode, all internal circuitry is powered down, excluding the internal reference. The AD7329
enters autostandby mode on the 15
Normal mode. All internal circuitry is powered up at all times.
Description
The channel sequencer is not used. The analog channel, selected by programming the ADD2 to ADD0 bits in the control
register, selects the next channel for conversion.
Uses the sequence of channels that were previously programmed in the sequence register for conversion. The AD7329
starts converting on the lowest channel in the sequence. The channels are converted in ascending order. If uninterrupted,
the AD7329 keeps converting the sequence. The range for each channel defaults to the range previously written into the
corresponding range register.
This configuration is used in conjunction with the channel address bits in the control register. This allows continuous
conversions on a consecutive sequence of channels, from Channel 0 through a final channel selected by the channel
address bits in the control register. The range for each channel defaults to the range previously written into the
corresponding range register.
The channel sequencer is not used. The analog channel, selected by programming the ADD2 bit to ADD0 bit in the control
register, selects the next channel for conversion.
th
SCLK rising edge after the control register is updated.
Rev. A | Page 27 of 40
th
SCLK rising edge when the control register is updated.
AD7329