AD7329 Analog Devices, AD7329 Datasheet - Page 19

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AD7329

Manufacturer Part Number
AD7329
Description
1 MSPS , 8-Channel, Software Selectable True Bipolar Input, 12-Bit Plus Sign A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD7329

Resolution (bits)
13bit
# Chan
8
Sample Rate
1MSPS
Interface
Ser,SPI
Analog Input Type
Diff-Bip,Diff-Uni,SE-Uni
Ain Range
Bip (Vref),Bip (Vref) x 2,Bip (Vref) x 4,Bip 10V,Bip 2.5V,Bip 5.0V,Uni (Vref),Uni 10V
Adc Architecture
SAR
Pkg Type
SOP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7329BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Care should be taken to ensure that the analog input does not
exceed the V
Exceeding this value causes the diodes to become forward
biased and to start conducting into either the V
the V
without causing irreversible damage to the part.
In Figure 30 and Figure 31, Capacitor C1 is typically 4 pF and
can primarily be attributed to pin capacitance. Resistor R1 is a
lumped component made up of the on resistance of the input
multiplexer and the track-and-hold switch. Capacitor C2 is the
sampling capacitor; its capacitance varies depending on the
analog input range selected (see the Specifications section).
TRACK-AND-HOLD SECTION
The track-and-hold on the analog input of the AD7329 allows
the ADC to accurately convert an input sine wave of full-scale
amplitude to 13-bit accuracy. The input bandwidth of the track-
and-hold is greater than the Nyquist rate of the ADC. The
AD7329 can handle frequencies up to 20 MHz.
The ADC
and-hold circuit. This is a high impedance input. Connecting
the MUX
multiplexer output to the track-and-hold circuit. The input
voltage range on the ADC
register bits for the input channel selected. The user must
ensure that the input voltage to the ADC
selected voltage range.
The track-and-hold enters its tracking mode on the 14
rising edge after the CS falling edge. The time required to
acquire an input signal depends on how quickly the sampling
capacitor is charged. With zero source impedance, 300 ns is
sufficient to acquire the signal to the 13-bit level.
The acquisition time required is calculated using the following
formula:
where C is the sampling capacitance, and R is the resistance
seen by the track-and-hold amplifier looking at the input.
t
SS
ACQ
Figure 31. Equivalent Analog Input Circuit, Differential Mode
supply rail. These diodes can conduct up to 10 mA
= 10 × ((R
V
V
OUT
IN
IN
IN
+
pins connect directly to the input stage of the track-
DD
pins directly to the ADC
and V
C1
C1
SOURCE
V
V
V
V
DD
DD
SS
SS
SS
D
D
D
D
supply rails by more than 300 mV.
MUX
MUX
+ R)C)
IN
pins is determined by the range
OUT
OUT
+
C3
C3
ADC
ADC
IN
C4
C4
IN
IN
pins connects the
+
IN
pins is within the
R1
R1
DD
supply rail or
C2
C2
th
SCLK
Rev. A | Page 19 of 40
For the AD7329, the value of R includes the on resistance of the
input multiplexer and is typically 300 Ω. R
any extra source impedance on the analog input.
The AD7329 enters track mode on the 14
When the AD7329 is run at a throughput rate of 1 MSPS with
a 20 MHz SCLK signal, the ADC has approximately 1.5 SCLK
periods plus t
input signal. The ADC goes back into hold mode on the CS
falling edge.
The current required to drive the ADC is extremely small when
using the external op amp between the MUX
pins. This is due to the high input impedance of the op amp
placed between the MUX
in Figure 32, where the current required to drive the AD7329
input is <0.2 μA when
and ADC
0.19
0.18
0.17
0.16
0.15
0.20
0.14
35
30
25
20
15
10
5
0
IN
0
0
pins.
100
100
8
Figure 32. Input Current vs. Throughput Rate
Figure 33. Input Current vs. Throughput Rate
with a Wire Link Between MUX
and the quiet time, t
with AD8021 Between MUX
200
200
AD8021
300
300
THROUGHPUT RATE (kSPS)
THROUGHPUT RATE (kSPS)
OUT
400
400
and ADC
is placed between the MUX
V
V
SINGLE-ENDED MODE
50kHz ON SELECTED CHANNEL
f
T
AD8021 BETWEEN MUX
500
V
V
SINGLE-ENDED MODE
50kHz ON SELECTED CHANNEL
f
T
WIRE LINK BETWEEN MUX
500
IN
IN
DD
CC
A
AND ADC
DD
CC
A
AND ADC
= 50kHz
= 25°C
= 50kHz
= 25°C
QUIET
= 12V, V
= V
= 12V, V
= V
600
600
OUT
DRIVE
DRIVE
IN
OUT
, to acquire the analog
IN
and ADC
IN
pins. This can be seen
th
SS
700
SS
700
and ADC
PINS
PINS
SOURCE
= 5V
= 5V
SCLK rising edge.
= –12V
= –12V
OUT
800
800
IN
should include
and ADC
IN
OUT
900
900
AD7329
OUT
1000
1000
IN
OUT

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