AD7984 Analog Devices, AD7984 Datasheet - Page 15
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AD7984
Manufacturer Part Number
AD7984
Description
18-Bit, 1.33 MSPS PulSAR 10.5 mW ADC in MSOP/QFN
Manufacturer
Analog Devices
Datasheet
1.AD7984.pdf
(24 pages)
Specifications of AD7984
Resolution (bits)
18bit
# Chan
1
Sample Rate
1.33MSPS
Interface
Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(2Vref) p-p
Adc Architecture
SAR
Pkg Type
CSP,SOP
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SINGLE-TO-DIFFERENTIAL DRIVER
For applications using a single-ended analog signal, either
bipolar or unipolar, the
differential driver allows for a differential input into the part. The
schematic is shown in Figure 26.
R1 and R2 set the attenuation ratio between the input range and
the ADC range (V
the desired input resistance, signal bandwidth, antialiasing, and
noise contribution. For example, for the ±10 V range with a 4 kΩ
impedance, R2 = 1 kΩ and R1 = 4 kΩ.
R3 and R4 set the common mode on the IN− input, and R5 and R6
set the common mode on the IN+ input of the ADC. The common
mode should be close to V
with a single supply, R3 = 8.45 kΩ, R4 = 11.8 kΩ, R5 = 10.5 kΩ,
and R6 = 9.76 kΩ.
VOLTAGE REFERENCE INPUT
The AD7984 voltage reference input, REF, has a dynamic input
impedance and should therefore be driven by a low impedance
source with efficient decoupling between the REF and GND
pins, as explained in the Layout section.
When REF is driven by a very low impedance source (for
example, a reference buffer using the
a 10 μF (X5R, 0805 size) ceramic chip capacitor is appropriate
for optimum performance.
±5V, ..
±10V,
100nF
100nF
R5
R3
R1
Figure 26. Single-Ended-to-Differential Driver Circuit
R6
R4
REF
IN
FB
+5.2V
–0.2V
REF
R2
C
). R1, R2, and C
F
ADA4941
ADA4941-x
OUTN
OUTP
REF
/2. For example, for the ±10 V range
15Ω
15Ω
single-ended-to-
F
AD8031
are chosen depending on
2.7nF
2.7nF
10µF
or the AD8605),
IN+
IN–
GND
REF
AD7984
+5V REF
+2.5V
VDD
Rev. A | Page 15 of 24
If an unbuffered reference voltage is used, the decoupling value
depends on the reference used. For instance, a 22 μF (X5R,
1206 size) ceramic chip capacitor is appropriate for optimum
performance using a low temperature drift
If desired, a reference-decoupling capacitor with values as small
as 2.2 μF can be used with a minimal impact on performance,
especially DNL.
Regardless, there is no need for an additional lower value
ceramic decoupling capacitor (for example, 100 nF) between the
REF and GND pins.
POWER SUPPLY
The AD7984 uses two power supply pins: a core supply (VDD) and
a digital input/output interface supply (VIO). VIO allows direct
interface with any logic between 1.8 V and 5.5 V. To reduce the
number of supplies needed, VIO and VDD can be tied together.
The AD7984 is independent of power supply sequencing between
VIO and VDD. Additionally, it is very insensitive to power supply
variations over a wide frequency range, as shown in Figure 27.
To ensure optimum performance, VDD should be roughly half
of REF, the voltage reference input. For example, if REF is 5.0 V,
VDD should be set to 2.5 V (±5%).
95
90
85
80
75
70
65
60
1
Figure 27. PSRR vs. Frequency
10
FREQUENCY (kHz)
100
ADR43x
AD7984
reference.
1000