SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 1161
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SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
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39.6.3.2
Name:
Address:
Access:
• DMA_x: DMA Channel x Interrupt
This bit is set when an interrupt is triggered by the DMA channel x. This triggers a USB interrupt if the corresponding bit in
UOTGHS_HSTIMR is one.
This bit is cleared when the UOTGHS_HSTDMASTATUSx interrupt source is cleared.
• PEP_x: Pipe x Interrupt
This bit is set when an interrupt is triggered by the endpoint x (UOTGHS_HSTPIPISRx). This triggers a USB interrupt if the
corresponding bit in UOTGHS_HSTIMR is one.
This bit is cleared when the interrupt source is served.
• HWUPI: Host Wake-Up Interrupt
This bit is set when the host controller is in the suspend mode (SOFE is zero) and an upstream resume from the peripheral
is detected.
This bit is set when the host controller is in the suspend mode (SOFE is zero) and a peripheral disconnection is detected.
This bit is set when the host controller is in the Idle state (UOTGHS_SR.VBUSRQ is zero, no VBus is generated), and an
OTG SRP event initiated by the peripheral is detected (UOTGHS_SR.SRPI is one).
This interrupt is generated even if the clock is frozen by UOTGHS_CTRL.FRZCLK bit.
• HSOFI: Host Start of Frame Interrupt
This bit is set when a SOF is issued by the Host controller. This triggers a USB interrupt when HSOFE is one. When using
the host controller in low speed mode, this bit is also set when a keep-alive is sent.
This bit is cleared when UOTGHS_HSTICR.HSOFIC bit is written to one.
• RXRSMI: Upstream Resume Received Interrupt
This bit is set when an Upstream Resume has been received from the Device.
This bit is cleared when UOTGHS_HSTICR.RXRSMIC is written to one.
• RSMEDI: Downstream Resume Sent Interrupt
This bit set when a Downstream Resume has been sent to the Device.
This bit is cleared when UOTGHS_HSTICR.RSMEDIC bit is written to one.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
PEP_7
31
23
15
–
–
7
–
Host Global Interrupt Status Register
UOTGHS_HSTISR
0x400AC404
Read-only
DMA_6
HWUPI
PEP_6
30
22
14
–
6
DMA_5
PEP_5
HSOFI
29
21
13
–
5
RXRSMI
DMA_4
PEP_4
28
20
12
–
4
RSMEDI
DMA_3
PEP_3
27
19
11
–
3
DMA_2
PEP_2
RSTI
26
18
10
–
2
DMA_1
DDISCI
PEP_9
PEP_1
25
17
9
1
SAM3X/A
SAM3X/A
DCONNI
PEP_8
PEP_0
24
16
–
8
0
1161
1161
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