SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 100
SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
- Current page: 100 of 1465
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11.12.1.3
11.12.1.4
11.12.1.5
11.12.2
11.12.2.1
100
100
ADR
SAM3X/A
SAM3X/A
LDR and STR, immediate offset
Restrictions
Condition flags
Examples
Syntax
R1, TextMessage
Values of label must be within the range of 4095 to +4095 from the address in the PC.
You might have to use the .W suffix to get the maximum offset range or to generate addresses
that are not word-aligned. See
Rd must not be SP and must not be PC.
This instruction does not change the flags.
Load and Store with immediate offset, pre-indexed immediate offset, or post-indexed immediate
offset.
where:
op
type
cond
Rt
Rn
offset
Rt2
op{type}{cond} Rt, [Rn {, #offset}]
op{type}{cond} Rt, [Rn, #offset]!
op{type}{cond} Rt, [Rn], #offset
opD{cond} Rt, Rt2, [Rn {, #offset}]
opD{cond} Rt, Rt2, [Rn, #offset]!
opD{cond} Rt, Rt2, [Rn], #offset
LDR
STR
B
SB
H
SH
-
; Write address value of a location labelled as
; TextMessage to R1
is one of:
Load Register.
Store Register.
is one of:
unsigned byte, zero extend to 32 bits on loads.
signed byte, sign extend to 32 bits (LDR only).
unsigned halfword, zero extend to 32 bits on loads.
signed halfword, sign extend to 32 bits (LDR only).
omit, for word.
is an optional condition code, see
is the register to load or store.
is the register on which the memory address is based.
is an offset from Rn. If offset is omitted, the address is the contents of Rn.
is the additional register to load or store for two-word operations.
“Instruction width selection” on page
“Conditional execution” on page
; immediate offset
; pre-indexed
; post-indexed
; immediate offset, two words
; pre-indexed, two words
; post-indexed, two words
98.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
96.
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