SAM9XE256 Atmel Corporation, SAM9XE256 Datasheet - Page 87
SAM9XE256
Manufacturer Part Number
SAM9XE256
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9260.pdf
(290 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9XE128.pdf
(860 pages)
4.SAM9XE128.pdf
(48 pages)
Specifications of SAM9XE256
Flash (kbytes)
256 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9260 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9XE128 PDF datasheet #3
- SAM9XE128 PDF datasheet #4
- Current page: 87 of 248
- Download datasheet (2Mb)
ARM DDI0198D
Fault address register (FAR)
For load and store instructions that can involve the transfer of more than one word
(LDM/STM, LDRD, STRD, and STC/LDC), the value written into the FAR register
depends on the type of access, and for external aborts, on whether or not the access
crosses a 1KB boundary. Table 3-10 shows the FAR values for multi-word transfers.
Compatibility Issues
To enable code to be easily ported to ARM architecture v4 or v5 MMUs, or to future
architectures, it is recommended that no reliance is made on external abort behavior.
The instruction FSR is intended for debugging purposes only. Code that is intended to
be ported to other ARM architecture v4 or v5 MMUs must not use the instruction FSR.
Source
Alignment
External abort on translation
Translation
Domain
Permission
External abort for noncached reads, or
nonbuffered writes.
Copyright © 2001-2003 ARM Limited. All rights reserved.
Table 3-10 FAR values for multi-word transfers
FAR
MVA of first aborted address in transfer.
MVA of first aborted address in transfer.
MVA of first aborted address in transfer.
MVA of first aborted address in transfer.
MVA of first aborted address in transfer.
MVA of last address before 1KB boundary if any
word of the transfer before 1KB boundary is
externally aborted.
MVA of last address in transfer if the first
externally aborted word is after 1KB boundary.
Memory Management Unit
3-23
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