SAM9R64 Atmel Corporation, SAM9R64 Datasheet - Page 134
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SAM9R64
Manufacturer Part Number
SAM9R64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9R64
Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
49
Ext Interrupts
49
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
3
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 134 of 284
- Download datasheet (2Mb)
Debug Interface
5.5
5-12
Determining the core and system state
When the core is in debug state, you can examine the core and system state by forcing
the load and store multiples into the instruction pipeline.
Before you can examine the core and system state, the debugger must determine
whether the processor entered debug from Thumb state or ARM state, by examining
bit 4 of the EmbeddedICE Logic debug status register. When bit 4 is HIGH, the core has
entered debug from Thumb state.
For more details about determining the core state, see Determining the core and system
state on page B-24.
Copyright © 1994-2001. All rights reserved.
ARM DDI 0029G
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