SAM7XC512 Atmel Corporation, SAM7XC512 Datasheet - Page 134

• Manufacturer Part Number: SAM7XC512
• Manufacturer: Atmel Corporation

Specifications of SAM7XC512

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 62
• Ext Interrupts: 62
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 3
• Can: 1
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Resolution (bits): No
• Temp. Sensor: No
• Crypto Engine: AES/DES
• Sram (kbytes): 128
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Debug Interface
5.5
5-12
Determining the core and system state
When the core is in debug state, you can examine the core and system state by forcing
the load and store multiples into the instruction pipeline.
Before you can examine the core and system state, the debugger must determine
whether the processor entered debug from Thumb state or ARM state, by examining
bit 4 of the EmbeddedICE Logic debug status register. When bit 4 is HIGH, the core has
entered debug from Thumb state.
For more details about determining the core state, see Determining the core and system
state on page B-24.
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