SAM7XC256 Atmel Corporation, SAM7XC256 Datasheet - Page 276
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SAM7XC256
Manufacturer Part Number
SAM7XC256
Description
Manufacturer
Atmel Corporation
Specifications of SAM7XC256
Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
62
Ext Interrupts
62
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
3
Can
1
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Resolution (bits)
No
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Glossary
Breakpoint
CISC
Complex Instruction Set Computer
CPSR
Control bits
Current Program Status Register
Debug state
Debugger
EmbeddedICE
Exception modes
Exception
External abort
FIQ
ICE
Idempotent
In-circuit emulator
Glossary-2
A location in the image. If execution reaches this location, the debugger halts execution
of the image.
See also Watchpoint.
See Complex Instruction Set Computer.
A microprocessor that recognizes a large number od instructions.
See also Reduced Instruction Set Computer.
See Program Status Register.
The bottom eight bits of a program status register. The control bits change when an
exception arises and can be altered by software only when the processor is in a
privileged mode.
See Program Status Register
A condition that allows the monitoring and control of the execution of a processor.
Usually used to find errors in the application program flow.
A debugging system which includes a program, used to detect, locate, and correct
software faults, together with custom hardware that supports software debugging.
The EmbeddedICE Logic is controlled via the JTAG test access port, using a protocol
converter such as MultiICE: an extra piece of hardware that allows software tools to
debug code running on a target processor. See also ICE and JTAG
Privileged modes that are entered when specific exceptions occur.
Handles an event. For example, an exception could handle an external interrupt or an
undefined instruction.
An abort that is generated by the external memory system.
Fast interrupt.
See In-circuit emulator.
A mathematical quantity that when applied to itself under a given binary operation
equals itself.
An In-Circuit Emulator (ICE), is a device that aids the debugging of hardware and
software. Debuggable ARM processors such as the ARM7TDMI have extra hardware
called EmbeddedICE to assist this process.
See also EmbeddedICE.
Copyright © 1994-2001. All rights reserved.
ARM DDI 0029G
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