SAM7XC256 Atmel Corporation, SAM7XC256 Datasheet - Page 169
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SAM7XC256
Manufacturer Part Number
SAM7XC256
Description
Manufacturer
Atmel Corporation
Specifications of SAM7XC256
Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
62
Ext Interrupts
62
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
3
Can
1
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Resolution (bits)
No
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Cycle
1
2
3
4
6.18
ARM DDI 0029G
Address
pc+2L
pc+2L
Xn
Xn+4
Xn+8
Undefined instructions and coprocessor absent
MAS
[1:0]
i
i
2
2
When the processor attempts to execute an instruction that neither it nor a coprocessor
can perform (including all undefined instructions) this causes the processor to take the
undefined instruction trap.
Cycle timings are listed in Table 6-21 where:
•
•
•
•
nRW
0
0
0
0
C represents the current mode-dependent value
T represents the current state-dependent value.
Coprocessor instructions are not available in Thumb state.
CPA and CPB are HIGH during the undefined instruction trap.
Note
Copyright © 1994-2001. All rights reserved.
Data
(pc+2L)
-
(Xn)
(Xn+4)
nMREQ
1
0
0
0
Table 6-21 Undefined instruction cycle operations
SEQ
0
0
1
1
nOPC
0
0
0
0
nCPI
0
1
1
1
nTRANS
C
C
1
1
Instruction Cycle Timings
Mode
Old
Old
00100
00100
TBIT
T
T
0
0
6-27
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