SAM7SE256 Atmel Corporation, SAM7SE256 Datasheet - Page 51

• Manufacturer Part Number: SAM7SE256
• Manufacturer: Atmel Corporation

Specifications of SAM7SE256

• Flash (kbytes): 256 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 48 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 88
• Ext Interrupts: 88
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

12.3.2
12.4
6222F–ATARM–14-Jan-11
Debug and Test Pin Description
Test Environment
Figure 12-3
ter. In this example, the “board in test” is designed using a number of JTAG-compliant devices.
These devices can be connected to form a single scan chain.
Figure 12-3. Application Test Environment Example
Table 12-1.
Pin Name
NRST
TST
TCK
TDI
TDO
TMS
JTAGSEL
DRXD
DTXD
shows a test environment example. Test vectors are sent and interpreted by the tes-
Debug and Test Pin List
AT91SAM7SExx-based Application Board In Test
Connector
ICE/JTAG
AT91SAM7SExx
Interface
JTAG
Function
Microcontroller Reset
Test Mode Select
Test Clock
Test Data In
Test Data Out
Test Mode Select
JTAG Selection
Debug Receive Data
Debug Transmit Data
Chip n
ICE and JTAG
Debug Unit
Reset/Test
Test Adaptor
Chip 2
Chip 1
SAM7SE512/256/32
Tester
Input/Output
Output
Output
Type
Input
Input
Input
Input
Input
Input
Active Level
High
Low
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