SAM7S161 Atmel Corporation, SAM7S161 Datasheet - Page 347

• Manufacturer Part Number: SAM7S161
• Manufacturer: Atmel Corporation

Specifications of SAM7S161

• Flash (kbytes): 16 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

T
30.10.5
Name:
Access:
Reset Value: 0x00000000
TWI_CWGR is only used in Master mode.
• CLDIV: Clock Low Divider
The SCL low period is defined as follows:
• CHDIV: Clock High Divider
The SCL high period is defined as follows:
T
• CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
6175L–ATARM–28-Jul-11
low
high
=
=
31
23
15
(
–
7
(
(
CLDIV
(
CHDIV
TWI Clock Waveform Generator Register
TWI_CWGR
Read-write
×
×
2
CKDIV
2
CKDIV
30
22
14
–
6
)
+
)
+
4 )
4 )
×
×
T
MCK
T
MCK
29
21
13
–
5
28
20
12
–
4
CHDIV
CLDIV
27
19
11
–
3
26
18
10
–
2
SAM7S Series
CKDIV
25
17
–
9
1
24
16
–
8
0
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