SAM7S161 Atmel Corporation, SAM7S161 Datasheet - Page 324
SAM7S161
Manufacturer Part Number
SAM7S161
Description
Manufacturer
Atmel Corporation
Specifications of SAM7S161
Flash (kbytes)
16 Kbytes
Pin Count
64
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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324
SAM7S Series
Read-write Flowcharts
The following flowcharts shown in
page
give examples for read and write operations. A polling or interrupt method can be used to check
the status bits. The interrupt method requires that the interrupt enable register (TWI_IER) be
configured first.
Figure 30-14. TWI Write Operation with Single Data Byte without Internal Address
326,
Figure 30-17 on page
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Device slave address (DADR)
Set the Master Mode register:
327,
TWI_CR = MSEN + SVDIS
Write ==> bit MREAD = 0
TWI_THR = Data to send
Set the Control register:
Load Transmit register
- Transfer direction bit
Read Status register
Read Status register
Figure
(Needed only once)
Transfer finished
- Master enable
TXCOMP = 1?
Set TWI clock
Figure 30-18 on page 328
TXRDY = 1?
Yes
Yes
BEGIN
30-14,
Figure 30-15 on page
No
No
and
Figure 30-19 on page 329
325,
6175L–ATARM–28-Jul-11
Figure 30-16 on
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