SAM3N1B Atmel Corporation, SAM3N1B Datasheet - Page 285
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SAM3N1B
Manufacturer Part Number
SAM3N1B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N1B
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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18.3.3.7
18.3.3.8
11011A–ATARM–04-Oct-10
Security Bit Protection
Unique Identifier
The 4/8/12 MHz Fast RC oscillator is calibrated in production. This calibration can be read
through the Get CALIB Bit command. The table below shows the bit implementation for each
frequency:
The RC calibration for 4 MHz is set to 1,000,000.
When the security is enabled, access to the Flash, either through the JTAG/SWD interface or
through the Fast Flash Programming Interface, is forbidden. This ensures the confidentiality of
the code programmed in the Flash.
The security bit is GPNVM0.
Disabling the security bit can only be achieved by asserting the ERASE pin at 1, and after a full
Flash erase is performed. When the security bit is deactivated, all accesses to the Flash are
permitted.
Each part is programmed with a 128-bit Unique Identifier. It can be used to generate keys for
example.
To read the Unique Identifier the sequence is:
Note that during the sequence, the software can not run out of Flash (or the second plane in
case of dual plane).
RC Calibration Frequency
8 MHz output
12 MHz output
• Send the Start Read unique Identifier command (STUI) by writing the Flash Command
• When the Unique Identifier is ready to be read, the FRDY bit in the Flash Programming
• The Unique Identifier is located in the first 128 bits of the Flash memory mapping. So, at the
• To stop the Unique Identifier mode, the user needs to send the Stop Read unique Identifier
• When the Stop read Unique Identifier command (SPUI) has been performed, the FRDY bit in
Register with the STUI command.
Status Register (EEFC_FSR) falls.
address
command (SPUI) by writing the Flash Command Register with the SPUI command.
the Flash Programming Status Register (EEFC_FSR) rises. If an interrupt was enabled by
setting the FRDY bit in EEFC_FMR, the interrupt line of the NVIC is activated.
0x80000-0x8000F
.
EEFC_FRR Bits
[28 - 22]
[38 - 32]
SAM3N
285
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