ATxmega128D4 Atmel Corporation, ATxmega128D4 Datasheet - Page 126
ATxmega128D4
Manufacturer Part Number
ATxmega128D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128D4
Flash (kbytes)
128 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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8210B–AVR–04/10
Figure 12-4. Period and Compare Double Buffering
When the CC channels is used for capture operation a similar Double buffering mechanism is
used, but the Buffer Valid flag is set on the capture event as shown in
the buffer and the corresponding CCx register acts like a FIFO. When the CC register is empty
or read, any contents in the buffer is passed to the CC register. The Buffer valid flag is passed to
the CCx Interrupt Flag (IF) which is them set and the optional interrupt is generated.
Figure 12-5. Capture Double Buffering
Both the CCx and CCxBUF registers are available in the I/O register address map. This allows
initialization and bypassing of the buffer register, and the double buffering feature.
UPDATE
"INT request"
"capture"
BV
IF
EN
EN
BV
CCxBUF
CCx
CNT
EN
EN
CNT
CCxBUF
=
CCx
"write enable"
"match"
"data"
Figure
XMEGA D
12-5. For capture
126
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