ATxmega128D4 Atmel Corporation, ATxmega128D4 Datasheet - Page 266
ATxmega128D4
Manufacturer Part Number
ATxmega128D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128D4
Flash (kbytes)
128 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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22.4.5.7
22.4.5.8
22.4.6
8210B–AVR–04/10
Instruction Set Summary
KEY - Set Activation Key
REPEAT - Set Instruction Repeat Counter
The KEY instruction is used to communicate the activation key bytes that is required for activat-
ing the NVM interfaces.
The REPEAT instruction is used to store count values that are serially shifted into the physical
layer shift-register to the Repeat Counter Register. The instruction that is loaded directly after
the REPEAT instruction operand(s) will be repeated a number of times according to the speci-
fied Repeat Counter Register value. Hence, the initial Repeat Counter Value plus one, gives the
total number of times the instruction will be executed. Setting the Repeat Counter Register to
zero makes the following instruction run once without being repeated.
The REPEAT cannot be repeated. The KEY instruction cannot be repeated, and will override the
current value of the REPEAT counter register
The PDI Instruction set summary is shown in
Figure 22-10 on page
267.
XMEGA D
266
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