ATxmega128D4 Atmel Corporation, ATxmega128D4 Datasheet - Page 111
ATxmega128D4
Manufacturer Part Number
ATxmega128D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128D4
Flash (kbytes)
128 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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11.13.4
11.13.5
11.13.6
11.13.7
8210B–AVR–04/10
DIRTGL - Data Direction Toggle Register
OUT - Data Output Value
OUTSET - Data Output Value Set Register
OUTCLR - Data Output Value Clear Register
• Bit 7:0 - DIRTGL[7:0]: Port Data Direction Toggle
This register can be used instead of a Read-Modify-Write to toggle the direction on individual
pins. Writing a one to a bit will toggle the corresponding bit in the DIR register. Reading this reg-
ister will return the value of the DIR register.
• Bit 7:0 - OUT[7:0]: Port Data Output value
This register sets the data output value for the individual pins in the port. If OUTn is written to
one, pin n is driven high. If OUTn is written to zero, pin n is driven low. For this setting to have
any effect the pin direction must be set as output.
• Bit 7:0 - OUTSET[7:0]: Data Output Value Set
This register can be used instead of a Read-Modify-Write to set the output value on individual
pins to one. Writing a one to a bit will set the corresponding bit in the OUT register. Reading this
register will return the value in the OUT register.
Bit
+0x03
Read/Write
Initial Value
Bit
+0x04
Read/Write
Initial Value
Bit
+0x05
Read/Write
Initial Value
Bit
+0x06
Read/Write
Initial Value
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
5
0
5
0
5
5
0
0
R/W
R/W
R/W
R/W
4
0
4
0
4
0
4
0
OUTCLR[7:0]
OUTSET[7:0]
DIRTGL[7:0]
OUT[7:0]
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
XMEGA D
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
OUTSET
OUTCLR
DIRTGL
OUT
111
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