ATtiny24A Atmel Corporation, ATtiny24A Datasheet - Page 62

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ATtiny24A

Manufacturer Part Number
ATtiny24A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny24A

Flash (kbytes)
2 Kbytes
Pin Count
14
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
12
Ext Interrupts
12
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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62
ATtiny24A/44A/84A
• Port A, Bit 6 – ADC6/DI/SDA/MOSI/OC1A/PCINT6
• Port A, Bit 7 – ADC7/OC0B/ICP1/PCINT7
Table
signals shown in
Table 10-4.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
• ADC6: Analog to Digital Converter, Channel 6
• SDA: Two-wire mode Serial Interface Data.
• DI: Data Input in USI Three-wire mode. USI Three-wire mode does not override normal port
• MOSI: Master Data output, Slave Data input for SPI channel. When the SPI is enabled as a
• OC1A, Output Compare Match output: The PA6 pin can serve as an external output for the
• PCINT6: Pin Change Interrupt source 6. The PA6 pin can serve as an external interrupt
• ADC7: Analog to Digital Converter, Channel 7
• OC1B, Output Compare Match output: The PA7 pin can serve as an external output for the
• ICP1, Input Capture Pin: The PA7 pin can act as an Input Capture Pin for Timer/Counter1.
• PCINT7: Pin Change Interrupt source 7. The PA7 pin can serve as an external interrupt
functions, so pin must be configure as an input for DI function.
Slave, this pin is configured as an input regardless of the setting of DDA6. When the SPI is
enabled as a Master, the data direction of this pin is controlled by DDA6. When the pin is
forced by the SPI to be an input, the pull-up can still be controlled by the PORTA6 bit.
Timer/Counter1 Compare Match A. The pin has to be configured as an output (DDA6 set
(one)) to serve this function. This is also the output pin for the PWM mode timer function.
source for pin change interrupt 0.
Timer/Counter1 Compare Match B. The pin has to be configured as an output (DDA7 set
(one)) to serve this function. This is also the output pin for the PWM mode timer function.
source for pin change interrupt 0.
10-4,
PA7/ADC7/OC0B/ICP1/
PCINT7
0
0
0
0
OC0B enable
OC0B
0
PCINT7 • PCIE0 + ADC7D
PCINT7/ICP1 Input
ADC7 Input
PCINT7 • PCIE0
Table 10-5
Overriding Signals for Alternate Functions in PA[7:5]
Figure 10-5 on page
and
Table 10-6
58.
PA6/ADC6/DI/SDA/MOSI/
OC1A/ PCINT6
0
0
USIWM1
(SDA + PORTA6) • DDA6
(USIWM1 • DDA6) +
OC1A enable
( USIWM1• DDA6) • OC1A
0
USISIE + (PCINT6 •
PCIE0) + ADC6D
USISIE + PCINT6 • PCIE0
DI/SDA/PCINT6 Input
ADC6 Input
relate the alternate functions of Port A to the overriding
.
.
PA5/ADC5/MISO/DO/
OC1B/ PCINT5
0
0
0
0
(USIWM1 • USIWM0) + OC1B
enable
USIWM1 • USIWM0 • DO +
(USIWM1 + USIWM0) • OC1B
0
PCINT5 • PCIE + ADC5D
PCINT5 • PCIE
PCINT5 Input
ADC5 Input
8183D–AVR–04/11

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