ATtiny24A Atmel Corporation, ATtiny24A Datasheet - Page 35

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ATtiny24A

Manufacturer Part Number
ATtiny24A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny24A

Flash (kbytes)
2 Kbytes
Pin Count
14
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
12
Ext Interrupts
12
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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7.3
7.4
7.4.1
7.4.2
7.4.3
7.4.4
8183D–AVR–04/11
Power Reduction Register
Minimizing Power Consumption
Analog to Digital Converter
Analog Comparator
Brown-out Detector
Internal Voltage Reference
The Power Reduction Register (PRR), see
vides a method to reduce power consumption by stopping the clock to individual peripherals.
When the clock for a peripheral is stopped then:
The peripheral should in most cases be disabled before stopping the clock. Clearing the PRR bit
wakes up the peripheral and puts it in the same state as before shutdown.
Peripheral shutdown can be used in Idle mode and Active mode to significantly reduce the over-
all power consumption. See
other sleep modes, the clock is already stopped.
There are several issues to consider when trying to minimize the power consumption in an AVR
controlled system. In general, sleep modes should be used as much as possible, and the sleep
mode should be selected so that as few as possible of the device’s functions are operating. All
functions not needed should be disabled. In particular, the following modules may need special
consideration when trying to achieve the lowest possible power consumption.
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-
abled before entering any sleep mode. When the ADC is turned off and on again, the next
conversion will be an extended conversion. See
details on ADC operation.
When entering Idle mode, the Analog Comparator should be disabled if not used. When entering
ADC Noise Reduction mode, the Analog Comparator should be disabled. In the other sleep
modes, the Analog Comparator is automatically disabled. However, if the Analog Comparator is
set up to use the Internal Voltage Reference as input, the Analog Comparator should be dis-
abled in all sleep modes. Otherwise, the Internal Voltage Reference will be enabled,
independent of sleep mode. See
ure the Analog Comparator.
If the Brown-out Detector is not needed in the application, this module should be turned off. If the
Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in all sleep modes,
and hence, always consume power. In the deeper sleep modes, this will contribute significantly
to the total current consumption. See
able” on page 34
The Internal Voltage Reference will be enabled when needed by the Brown-out Detection, the
Analog Comparator or the ADC. If these modules are disabled as described in the sections
above, the internal voltage reference will be disabled and it will not be consuming power. When
• The current state of the peripheral is frozen.
• The associated registers can not be read or written.
• Resources used by the peripheral will remain occupied.
for details on how to configure the Brown-out Detector.
“Supply Current of I/O Modules” on page 182
“Analog Comparator” on page 128
“Brown-out Detection” on page 40
“PRR – Power Reduction Register” on page
“Analog to Digital Converter” on page 132
ATtiny24A/44A/84A
for details on how to config-
and
“Software BOD Dis-
for examples. In all
37, pro-
for
35

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