ATmega644 Atmel Corporation, ATmega644 Datasheet - Page 17

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ATmega644

Manufacturer Part Number
ATmega644
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega644

Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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6. AVR Memories
6.1
2593N–AVR–07/10
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the ATmega644. The AVR architecture has two
main memory spaces, the Data Memory and the Program Memory space. In addition, the
ATmega644 features an EEPROM Memory for data storage. All three memory spaces are linear
and regular.
The ATmega644 contains 64 Kbytes On-chip In-System Reprogrammable Flash memory for
program storage. Since all AVR instructions are 16 bitsor 32 bits wide, the Flash is organized as
32/64 × 16. For software security, the Flash Program memory space is divided into two sections,
Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega644
Program Counter (PC) is 15/16 bits wide, thus addressing the 32/64K program memory loca-
tions. The operation of Boot Program section and associated Boot Lock bits for software
protection are described in detail in
ming” on page 284
SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description.
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 6-1.
14.
Program Memory Map
contains a detailed description on Flash data serial downloading using the
Application Flash Section
”Memory Programming” on page
Boot Flash Section
”Instruction Execution Tim-
284.
ATmega644
”Memory Program-
17

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