ATmega168 Automotive Atmel Corporation, ATmega168 Automotive Datasheet - Page 86

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ATmega168 Automotive

Manufacturer Part Number
ATmega168 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega168 Automotive

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
12. 8-bit Timer/Counter0 with PWM
12.1
86
Overview
ATmega48/88/168 Automotive
Timer/Counter0 is a general purpose 8-bit Timer/Counter module, with two independent Output
Compare Units, and with PWM support. It allows accurate program execution timing (event man-
agement) and wave generation. The main features are:
A simplified block diagram of the 8-bit Timer/Counter is shown in
placement of I/O pins, refer to
ters, including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit
locations are listed in the
The PRTIM0 bit in
enable Timer/Counter0 module.
Figure 12-1. 8-bit Timer/Counter Block Diagram
• Two Independent Output Compare Units
• Double Buffered Output Compare Registers
• Clear Timer on Compare Match (Auto Reload)
• Glitch Free, Phase Correct Pulse Width Modulator (PWM)
• Variable PWM Period
• Frequency Generator
• Three Independent Interrupt Sources (TOV0, OCF0A, and OCF0B)
“Power Reduction Register - PRR” on page 39
Timer/Counter
TCCRnA
OCRnA
TCNTn
OCRnB
=
=
“8-bit Timer/Counter Register Description” on page
“Pinout ATmega48/88/168” on page
Direction
Count
Clear
Control Logic
TOP
=
TCCRnB
Value
BOTTOM
Fixed
TOP
clk
=
Tn
0
Prescaler
OCnA
(Int.Req.)
OCnB
(Int.Req.)
Generation
Generation
Waveform
Waveform
2. CPU accessible I/O Regis-
Figure
TOVn
(Int.Req.)
OCnB
OCnA
must be written to zero to
Oscillator
T/C
clk
I/O
12-1. For the actual
97.
TOSC1
TOSC2
7530I–AVR–02/10

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