ATmega168 Automotive Atmel Corporation, ATmega168 Automotive Datasheet - Page 250
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ATmega168 Automotive
Manufacturer Part Number
ATmega168 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA168_AUTOMOTIVE.pdf
(19 pages)
3.ATMEGA168_AUTOMOTIVE.pdf
(340 pages)
Specifications of ATmega168 Automotive
Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA168_AUTOMOTIVE PDF datasheet #2
- ATMEGA168_AUTOMOTIVE PDF datasheet #3
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21.6.2
250
ATmega48/88/168 Automotive
ADC Control and Status Register A – ADCSRA
The value of these bits selects which analog inputs are connected to the ADC. See
for details. If these bits are changed during a conversion, the change will not go in effect until this
conversion is complete (ADIF in ADCSRA is set).
Table 21-3.
• Bit 7 – ADEN: ADC Enable
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the
ADC off while a conversion is in progress, will terminate this conversion.
• Bit 6 – ADSC: ADC Start Conversion
In Single Conversion mode, write this bit to one to start each conversion. In Free Running mode,
write this bit to one to start the first conversion. The first conversion after ADSC has been written
after the ADC has been enabled, or if ADSC is written at the same time as the ADC is enabled,
will take 25 ADC clock cycles instead of the normal 13. This first conversion performs initializa-
tion of the ADC.
ADSC will read as one as long as a conversion is in progress. When the conversion is complete,
it returns to zero. Writing zero to this bit has no effect.
Bit
Read/Write
Initial Value
MUX3..0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Input Channel Selections
ADEN
R/W
7
0
ADSC
R/W
6
0
ADATE
Single Ended Input
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
1.1V (V
0V (GND)
R/W
5
0
BG
)
ADIF
R/W
4
0
ADIE
R/W
3
0
ADPS2
R/W
2
0
ADPS1
R/W
1
0
ADPS0
R/W
0
0
7530I–AVR–02/10
Table 21-3
ADCSRA
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