AT89C51CC02 Atmel Corporation, AT89C51CC02 Datasheet - Page 129

• Manufacturer Part Number: AT89C51CC02
• Manufacturer: Atmel Corporation

Specifications of AT89C51CC02

• Flash (kbytes): 16 Kbytes
• Max. Operating Frequency: 40 MHz
• Cpu: 8051-12C
• Max I/o Pins: 20
• Uart: 1
• Can: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 62.5
• Sram (kbytes): 0.5
• Eeprom (bytes): 2048
• Self Program Memory: API
• Operating Voltage (vcc): 3.0 to 5.5
• Timers: 4
• Isp: UART/CAN
• Watchdog: Yes

IT ADC Management
Routine Examples
4126L–CAN–01/08
An interrupt end-of-conversion will occurs when the bit ADEOC is activated and the bit
EADC is set. For re-arming the interrupt the bit ADEOC must be cleared by software.
Figure 55. ADC interrupt structure
Note:
1. Configure P1.2 and P1.3 in ADC channels
// configure channel P1.2 and P1.3 for ADC
// Enable the ADC
2. Start a standard conversion
// The variable ’channel’ contains the channel to convert
// The variable ’value_converted’ is an unsigned int
// Clear the field SCH[2:0]
// Select channel
// Start conversion in standard mode
// Wait flag End of conversion
// Clear the End of conversion flag
// read the value
3. Start a precision conversion (need interrupt ADC)
// The variable ’channel’ contains the channel to convert
// Enable ADC
// clear the field SCH[2:0]
// Select the channel
// Start conversion in precision mode
ADCF = 0Ch
ADCON = 20h
ADCON &= F8h
ADCON |= channel
ADCON |= 08h
while((ADCON & 01h)!= 01h)
ADCON &= EFh
value_converted = (ADDH << 2)+(ADDL)
EADC = 1
ADCON &= F8h
ADCON |= channel
ADCON |= 48h
To enable the ADC interrupt: EA = 1
ADEOC
ADCON.2
EADC
IEN1.1
AT/T89C51CC02
ADCI
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