AT83C5136 Atmel Corporation, AT83C5136 Datasheet - Page 124
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AT83C5136
Manufacturer Part Number
AT83C5136
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT83C5134.pdf
(166 pages)
Specifications of AT83C5136
Max. Operating Frequency
32 MHz
Cpu
8051-12C
Max I/o Pins
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Eeprom (bytes)
512
Operating Voltage (vcc)
2.7 to 3.6
Timers
4
Mask Rom (kbytes)
32
Watchdog
Yes
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Table 21-8.
Note:
Reset Value = 80h when UEPNUM = 0 (default Control Endpoint)
Reset Value = 00h otherwise for all other endpoints
Bit Number
EPEN
1-0
7
7
6
5
4
3
2
1. (X = EPNUM set in UEPNUM Register UEPNUM (S:C7h) USB Endpoint Number)
Bit Mnemonic Description
EPTYPE[1:0]
UEPCONX Register
UEPCONX (S:D4h)
USB Endpoint X Control Register
EPDIR
EPEN
DTGL
6
-
-
-
-
Endpoint Enable
Set this bit to enable the endpoint according to the device configuration. Endpoint 0 will
always be enabled after a hardware or USB bus reset and participate in the device
configuration.
Clear this bit to disable the endpoint according to the device configuration.
Reserved
The value read from this bit is always 0. Do not set this bit.
Reserved
The value read from this bit is always 0. Do not set this bit.
Reserved
The value read from this bit is always 0. Do not set this bit.
Data Toggle (Read-only)
This bit is set by hardware when a valid DATA0 packet is received and accepted.
This bit is cleared by hardware when a valid DATA1 packet is received and accepted.
Endpoint Direction
Set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints.
Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints.
This bit has no effect for Control endpoints.
Endpoint Type
Set this field according to the endpoint configuration (Endpoint 0 will always be
configured as control):
00Control endpoint
01Isochronous endpoint
10Bulk endpoint
11Interrupt endpoint
5
-
4
-
DTGL
3
EPDIR
2
EPTYPE1
1
7683C–USB–11/07
EPTYPE0
0
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