SC16C754IB80,557 NXP Semiconductors, SC16C754IB80,557 Datasheet - Page 11

• Manufacturer Part Number: SC16C754IB80,557
• Description: IC UART QUAD W/FIFO 80-LQFP
• Manufacturer: NXP Semiconductors

Specifications of SC16C754IB80,557

• Number Of Channels: 4, QUART
• Fifo's: 64 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935270057557; SC16C754IB80; SC16C754IB80

Philips Semiconductors
9397 750 11618
Product data
6.3.1 RX
6.3.2 TX
Table 3:
Remark: When using software flow control, the Xon/Xoff characters cannot be used
for data characters.
There are two other enhanced features relating to software flow control:
When software flow control operation is enabled, the SC16C754 will compare
incoming data with Xoff1,2 programmed characters (in certain cases, Xoff1 and Xoff2
must be received sequentially). When the correct Xoff character are received,
transmission is halted after completing transmission of the current character. Xoff
detection also sets IIR[4] (if enabled via IER[5]) and causes INT to go HIGH.
To resume transmission, an Xon1,2 character must be received (in certain cases
Xon1 and Xon2 must be received sequentially). When the correct Xon characters are
received, IIR[4] is cleared, and the Xoff interrupt disappears.
Xoff1/2 character is transmitted when the RX FIFO has passed the HALT trigger level
programmed in TCR[3:0].
Xon1/2 character is transmitted when the RX FIFO reaches the RESUME trigger
level programmed in TCR[7:4].
The transmission of Xoff/Xon(s) follows the exact same protocol as transmission of
an ordinary byte from the FIFO. This means that even if the word length is set to be 5,
6, or 7 characters, then the 5, 6, or 7 least significant bits of Xoff1,2/Xon1,2 will be
transmitted. (Note that the transmission of 5, 6, or 7 bits of a character is seldom
done, but this functionality is included to maintain compatibility with earlier designs.)
EFR[3]
X
X
X
1
0
1
•
•
Xon Any function (MCR[5]): Operation will resume after receiving any character
after recognizing the Xoff character. It is possible that an Xon1 character is
recognized as an Xon Any character, which could cause an Xon2 character to be
written to the RX FIFO.
Special character (EFR[5]): Incoming data is compared to Xoff2. Detection of the
special character sets the Xoff interrupt (IIR[4]) but does not halt transmission. The
Xoff interrupt is cleared by a read of the IIR. The special character is transferred to
the RX FIFO.
EFR[2]
X
X
X
0
1
1
Software flow control options (EFR[0:3])
Rev. 04 — 19 June 2003
EFR[1]
0
1
0
1
1
1
EFR[0]
0
0
1
1
1
1
TX, RX software flow controls
no receive flow control
receiver compared Xon1, Xoff1
receiver compares Xon2, Xoff2
transmit Xon1, Xoff1
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
transmit Xon2, Xoff2
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
transmit Xon1, Xon2, Xoff1, Xoff2
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
…continued
Quad UART with 64-byte FIFO
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
SC16C754
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