XC56309PV100A Freescale Semiconductor, XC56309PV100A Datasheet - Page 101

• Manufacturer Part Number: XC56309PV100A
• Manufacturer: Freescale Semiconductor

Specifications of XC56309PV100A

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 102KB
• Program Memory Size: Not RequiredKB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / Rohs Status: Not Compliant

Freescale Semiconductor
M_DI EQU 12
M_DO EQU 13
M_PCE EQU 15
M_TOF EQU 20
M_TCF EQU 21
;
M_PS EQU
M_PS0 EQU 21
M_PS1 EQU 22
;
M_TC0 EQU 4
M_TC1 EQU 5
M_TC2 EQU 6
M_TC3 EQU 7
;------------------------------------------------------------------------
;
;
;
;------------------------------------------------------------------------
;
M_DSTR EQU FFFFF4
M_DOR0 EQU $FFFFF3
M_DOR1 EQU $FFFFF2
M_DOR2 EQU $FFFFF1
M_DOR3 EQU $FFFFF0
;
M_DSR0 EQU $FFFFEF
M_DDR0 EQU $FFFFEE
M_DCO0 EQU $FFFFED
M_DCR0 EQU $FFFFEC
;
M_DSR1 EQU $FFFFEB
M_DDR1 EQU $FFFFEA
M_DCO1 EQU $FFFFE9
M_DCR1 EQU $FFFFE8
;
M_DSR2 EQU $FFFFE7
M_DDR2 EQU $FFFFE6
M_DCO2 EQU $FFFFE5
M_DCR2 EQU $FFFFE4
;
M_DSR3 EQU $FFFFE3
M_DDR3 EQU $FFFFE2
M_DCO3 EQU $FFFFE1
M_DCR3 EQU $FFFFE0
Timer Control Bits
Timer Prescaler Register Bit Flags
EQUATES for Direct Memory Access (DMA)
Register Addresses Of DMA
Register Addresses Of DMA0
Register Addresses Of DMA1
Register Addresses Of DMA2
Register Addresses Of DMA4
$600000
DSP56309 Technical Data, Rev. 7
; Data Input
; Data Output
; Prescaled Clock Enable
; Timer Overflow Flag
; Timer Compare Flag
; Prescaler Source Mask
; Timer Control 0
; Timer Control 1
; Timer Control 2
; Timer Control 3
; DMA Status Register
; DMA Offset Register 0
; DMA Offset Register 1
; DMA Offset Register 2
; DMA Offset Register 3
; DMA0 Source Address Register
; DMA0 Destination Address Register
; DMA0 Counter
; DMA0 Control Register
; DMA1 Source Address Register
; DMA1 Destination Address Register
; DMA1 Counter
; DMA1 Control Register
; DMA2 Source Address Register
; DMA2 Destination Address Register
; DMA2 Counter
; DMA2 Control Register
; DMA3 Source Address Register
; DMA3 Destination Address Register
; DMA3 Counter
; DMA3 Control Register
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