DSP-DEVKIT-2S60 Altera, DSP-DEVKIT-2S60 Datasheet - Page 15

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DSP-DEVKIT-2S60

Manufacturer Part Number
DSP-DEVKIT-2S60
Description
Manufacturer
Altera
Datasheet

Specifications of DSP-DEVKIT-2S60

Lead Free Status / Rohs Status
Not Compliant
Board Components & Interfaces
Altera Corporation
August 2006
Notes to
(1)
(2)
adc_CLK_IN1, adc_CLK_IN2
dac_CLKIN1, dac_CLKIN2
pld_CLKFB
adc_CLK_IN1_n, adc_CLK_IN2_n
dac_DACCLKIN1, dac_DACCLKIN2
pld_DACCLKIN
proto1_CLKOUT, proto2_CLKOUT
Table 3. Clock Distribution Signals (Part 2 of 2)
J3 and J4 control which clock is routed to the A/D converters. See
J18 and J19 control which clock is routed to the D/A converters. See
Table
Signal Name
3:
The Stratix II DSP development board can obtain a clock source from one
or more of the following sources:
The board can provide independent clocks from both the enhanced and
fast PLLs to the A/D converters, the D/A converters, and the other
components that require stable clock sources.
To implement this concept, the enhanced PLL5-dedicated pins drive the
A/D converters and associated functions, and the enhanced
PLL6-dedicated pins drive the D/A converters and associated functions.
The on-board crystal oscillator
An external clock (through an SMA connector or a Stratix II pin)
100-MHz oscillator
100-MHz oscillator
pld_CLKOUT signal from the
Stratix II pin J14
External CLKIN_n input (J11)
External DA_EXT_CLK input
(J12)
External DA_EXT_CLK input
(J12)
PROTO1 (J25 pin 13) PROTO2
(J28 pin 13) via a buffer (U7)
Reference Manual
Comes From
Table 9
Table 14
ADC A (U1 pins 8, 7) and B (U2 pins
8, 7)
DAC A (U14 pin 28) and B (U15 pin
28)
Stratix II device pin U1
ADC A (U1 pins 8, 7) and B (U2 pins
8, 7)
DAC A (U14 pin 28) and B (U15 pin
28)
Stratix II device pin E16
Stratix II device pins T32 and T30
for details.
for details.
(2)
(2)
(1)
(1)
Stratix II Development Board
Goes To
2–5