MAX3107ETG+ Maxim Integrated Products, MAX3107ETG+ Datasheet - Page 14

• Manufacturer Part Number: MAX3107ETG+
• Description: IC UART SPI/I2C 128 FIFO 24TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX3107ETG+

• Features: Internal Oscillators
• Number Of Channels: 4, QUART
• Fifo's: 128 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 2.35 V ~ 3.6 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• Mounting Type: Surface Mount
• Package / Case: 24-TQFN Exposed Pad
• Data Rate: 24 Mbps
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 2.35 V
• Supply Current: 0.64 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• No. Of Channels: 1
• Uart Features: 128-Word Transmit / Receive FIFO, Half-Duplex Echo Suppression, Shutdown And Autosleep Modes
• Supply Voltage Range: 2.35V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SPI/I
and Internal Oscillator
(All default reset values are 0x00, unless otherwise noted. All registers are R/W, unless otherwise noted.)
*Denotes nonzero default reset value: ISR = 0x60, LCR = 0x05, FIFOTrgLvl = 0xFF, PLLConfig = 0x01, DIVLSB = 0x01,
CLKSource = 0x08, RevID = 0xA1.
†Denotes nonread/write value: RHR = R, THR = W, ISR = COR, SpclCharInt = COR, STSInt = R/COR, LSR = R, TxFIFOLvl = R,
RxFIFOLvl = R, RevID = R.
14
FIFO DATA
RHR †
THR †
INTERRUPTS
IRQEn
ISR *†
LSRIntEn
LSR *†
SpclChrIntEn
SpclCharInt †
STSIntEn
STSInt *†
UART MODES
MODE1
MODE2
LCR *
RxTimeOut
HDplxDelay
IrDA
FIFO CONTROL
FlowLvl
FIFOTrgLvl *
TxFIFOLvl †
RxFIFOLvl †
FLOW CONTROL
FlowCtrl
XON1
XON2
XOFF1
XOFF2
GPIOs
GPIOConfg
GPIOData
CLOCK CONFIGURATION
PLLConfig*
BRGConfig
DIVLSB
DIVMSB
CLKSource *
REVISION
RevID *†
REGISTER
_____________________________________________________________________________________
2
C UART with 128-Word FIFOs
ADDR
0x0A
0x0B
0x0C
0x0D
0x0E
0x1A
0x1B
0x1C
0x1D
0x1E
0x00
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1F
PLLFactor1
EchoSuprs
CLKtoRTS
Resume3
SwFlow3
TimOut7
GPI3Dat
RxTrig3
GP3OD
RData7
TData7
CTSIEn
IRQSel
Setup3
CTSInt
CTSbit
TxFL7
RxFL7
Div15
BIT 7
Div7
RTS
Bit7
Bit7
Bit7
Bit7
—
—
—
—
—
—
—
1
RxEmptyInt
PLLFactor0
RxEmtyIEn
SleepIntEn
AutoSleep
MultiDrop
Resume2
SwFlow2
SleepInt
TxBreak
TimOut6
GPI2Dat
RxTrig2
GP2OD
RData6
TData6
Setup2
RxFL6
TxFL6
BIT 6
Div14
Div6
Bit6
Bit6
Bit6
Bit6
—
—
—
—
—
—
—
0
ForcedSleep
MultiDropInt
ClkRdyIntEn
ClockReady
MltDrpIntEn
ForceParity
TxEmptyInt
TxEmtyIEn
NoiseIntEn
Loopback
Resume1
SwFlow1
RxNoise
TimOut5
GPI1Dat
PreDiv5
4xMode
RData5
RxTrig1
GP1OD
TData5
Setup1
RxFL5
TxFL5
BIT 5
Div13
TxInv
Div5
Bit5
Bit5
Bit5
Bit5
—-
1
BREAKIntEn
TFifoTriglnt
SpecialChr
RBreakIEn
EvenParity
TrnscvCtrl
BREAKInt
Resume0
TxTrgIEn
SwFlow0
ExtClock
RxBreak
TimOut4
GPI0Dat
2xMode
RxTrig0
GP0OD
PreDiv4
RData4
TData4
Setup0
TxFL4
RxFL4
Div12
BIT 4
RxInv
Div4
Bit4
Bit4
Bit4
Bit4
—
—
0
FrameErrIEn
XOFF2IntEn
RFifoTrigInt
PLLBypass
RxEmtyInv
GPI3IntEn
SwFlowEn
XOFF2Int
GPO3Dat
RxTrgIEn
FrameErr
ParityEn
TimOut3
FRACT3
GP3Out
PreDiv3
RData3
GPI3Int
RTSHiZ
TxTrig3
TData3
RxFL3
Hold3
TxFL3
BIT 3
Div11
Halt3
Div3
MIR
Bit3
Bit3
Bit3
Bit3
0
XOFF1IntEn
RxParityErr
GPI2IntEn
GPO2Dat
XOFF1Int
RxTrigInv
ParityIEn
TimOut2
GPIAddr
StopBits
GP2Out
FRACT2
PreDiv2
RData2
TData2
STSIEn
GPI2Int
ShortIR
TxTrig2
STSInt
PLLEn
TXHiZ
TxFL2
RxFL2
Hold2
Div10
BIT 2
Halt2
Div2
Bit2
Bit2
Bit2
Bit2
0
SpclChrIEn
XON2IntEn
Register Map
RxOverrun
SpCharInt
ROverrIEn
GPI1IntEn
GPO1Dat
CrystalEn
TxDisabl
AutoCTS
XON2Int
Length1
TimOut1
FRACT1
FIFORst
GP1Out
PreDiv1
RData1
GPI1Int
TxTrig1
TData1
RxFL1
Hold1
TxFL1
BIT 1
Halt1
Div1
Div9
Bit1
Bit1
Bit1
Bit1
SIR
0
RTimoutIEn
XON1IntEn
LSRErrIEn
GPI0IntEn
GPO0Dat
LSRErrInt
RTimeout
IntOscEn
RxDisabl
XON1Int
TimOut0
AutoRTS
Length0
FRACT0
GP0Out
PreDiv0
RData0
GPI0Int
TxTrig0
TData0
IrDAEn
RxFL0
Hold0
TxFL0
BIT 0
Halt0
Div0
Div8
RST
Bit0
Bit0
Bit0
Bit0
1