SI3232-G-GQ Silicon Laboratories Inc, SI3232-G-GQ Datasheet - Page 62

• Manufacturer Part Number: SI3232-G-GQ
• Description: IC SLIC PROG DUAL-CH 64TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3232-G-GQ

• Function: Subscriber Line Interface Concept (SLIC)
• Interface: ISDN
• Number Of Circuits: 2
• Voltage - Supply: 3.13 V ~ 3.47 V
• Current - Supply: 28mA
• Power (watts): 280mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Product: Telecom
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Notes:
Addr
Reg
103
102
101
32
31
23
25
24
27
26
72
33
34
7
4
1
5
8
1.
2.
3.
4.
5.
6.
7.
Si3232
62
3
Any register not listed is reserved and must not be written. Default hex value is loaded to register following any RESET. Only registers ID, MSTREN, MSTRSTAT, and IRQ0 are valid while the
PLL is not locked (MSTRSTAT[PLOCK]).
Reserved bit values are indeterminate.
Register address is in decimal.
Read only.
Protected bits.
Per-channel bit(s).
Si3220 only.
RAMDATLO
RAMADDR
RAMDATHI
Mnemonic
RINGTALO
RAMSTAT
RINGCON
RINGTAHI
RINGTILO
RINGTIHI
POLREV
RLYCON
PMTILO
PMTIHI
THERM
RESET
SBIAS
ZRS
ZZ
Inactive Timer—High Byte
Polarity Reversal Settings
Inactive Timer—Low Byte
Pulse Metering Oscillator
Pulse Metering Oscillator
Active Timer—High Byte
Active Timer—Low Byte
Analog Complex Coeff
Ringing Configuration
Impedance Synthesis
Impedance Synthesis
RAM Address Status
Si3200 Thermometer
Analog Real Coeff
Ringing Oscillator
Ringing Oscillator
Ringing Oscillator
Ringing Oscillator
SLIC Bias Control
Battery Switching
Relay Driver and
Inactive Timer—
Inactive Timer—
RAM Address
Configuration
RAM Data—
RAM Data—
Description
Soft Reset
High Byte
High Byte
Low Byte
Low Byte
ENSYNC
STDBY
ZSDIS
STAT
Bit 7
4
6
5
4
RDACEN
SQLCH
ZSOHT
SEL
Bit 6
Impedance Synthesis Coefficients
5
Preliminary Rev. 0.96
5
6
4
Si3200 Thermometer
Relay Configuration
RINGUNB
SLIC Bias Control
Polarity Reversal
BSEL
CAPB
Bit 5
RAM Access
Soft Reset
Ringing
5
5
ZP[1:0]
BIASEN
6
RRAIL
TAEN
Bit 4
PULSETI[15:8]
RAMADDR[7:0]
PULSETI[7:0]
RAMDAT[15:8]
RAMDAT[7:0]
RINGTA[15:8]
RINGTI[15:8]
RINGTA[7:0]
RINGTI[7:0]
5
POLREV
RDOE
TIEN
Bit 3
7
7
OBIAS[1:0]
4
VOCZERO
RINGEN
GPO
Bit 2
5
RS[3:0]
4
UNBPOLR
RESETB
6
PREN
Bit 1
ABIAS[1:0]
ZZ[1:0]
RAMSTAT
RESETA
6
RAMP
TRAP
Bit 0
5
4
Type
Oper
Oper
Oper
Oper
Diag
Init
Init
Init
Init
Init
Init
Init
Init
Init
Init
Init
Init
Init
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
0x00
0x00
0xE0
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x45
0x00
0x00
Def.
Hex