SI3232-G-GQ Silicon Laboratories Inc, SI3232-G-GQ Datasheet - Page 51

• Manufacturer Part Number: SI3232-G-GQ
• Description: IC SLIC PROG DUAL-CH 64TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3232-G-GQ

• Function: Subscriber Line Interface Concept (SLIC)
• Interface: ISDN
• Number Of Circuits: 2
• Voltage - Supply: 3.13 V ~ 3.47 V
• Current - Supply: 28mA
• Power (watts): 280mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Product: Telecom
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Refer to "2. Typical Application Schematic" on page 17.
The pulldown resistor on the SDO pin is required to
allow this node to discharge after a logic high state to a
tri-state condition. The discharge occurs while SDO is
tri-stated during an 8 kHz transmission frame. The value
of the pulldown resistor depends on the capacitance
seen on the SDO pin. In the case of using a single
Si3232, the value of the pulldown resistor is 39 k Ω . This
assumes a 5 pF SDO pin capacitance and about a
15 pF load on the SDO pin. For applications using
multiple Si3232 devices or different capacitive loads on
the SDO pin, a different pulldown resistance needs to
be calculated.
The following design procedure is an example for
calculating the pulldown resistor on the SDO pin in a
system using eight Si3232 devices. A pullup resistor is
not allowed on the SDO pin.
1. The SDO node must discharge and remain discharged for
2. Allow five time constants for discharge where the
3. SDO will be in Hi-Z while SDI is sending control and
244 ns. The discharge occurs during the Hi-Z state;
therefore, the time to discharge is equal to the time in Hi-Z
time minus the 244 ns.
time constant, t = RC
address which are each 8 bits. Using the maximum
SCLK frequency of 16.13 MHz, the SDO will be in
Hi-Z for 16 / 16.13 MHz = 992 ns.
3:0
7
6
5
4
REG/RAM Register/RAM Access.
Reserved
BRDCST Indicates a broadcast operation that is intended for all devices in the daisy chain. This is
CID[3:0]
R/W
only valid for write operations since it would cause contention on the SDO pin during a
read.
Read/Write Bit.
0 = Write operation.
1 = Read operation.
0 = RAM access.
1 = Register access.
This field indicates the channel that is targeted by the operation. The 4-bit channel value is
provided LSB first. The devices reside on the daisy chain such that device 0 is nearest to
the controller, and device 15 is furthest down the SDI/SDU_THRU chain. (See Figure 26.)
As the CID information propagates down the daisy chain, each channel decrements the
CID by 1. The SDI nodes between devices will reflect a decrement of 2 per device since
each device contains two channels. The device receiving a value of 0 in the CID field will
respond to the SPI transaction. (See Figure 27.) If a broadcast to all devices connected to
the chain is requested, the CID will not decrement. In this case, the same 8-bit or 16-bit
data is presented to all channels regardless of the CID values.
Table 31. SPI Control Interface
Preliminary Rev. 0.96
4. We want to discharge and remain discharged for
5. To allow for some margin, let’s discharge in 85% of
6. Determine capacitive load on the SDO pin:
7. For a system with eight Si3220 devices, the
8. Using the equation t = RC, allowing five time
So, R must be less than 2.3 k Ω to allow the node to
discharge.
244 ns. Therefore, the discharge time is:
992 ns – 244 ns = 748 ns
this time. 748nS x 85% = 635.8 ns
capacitance seen on the SDO pin would be:
inch = 10 pF
constants to decay, and solving for R
a.Allow 5 pF for each Si3220 SDO pin that
b.Allow ~2 pF/inch (~0.8 pF/cm) for PCB trace.
c.Include the load capacitance of the host IC input.
a.8 x 5 pF for each Si3220 = 40 pF
b.Assume 5 inch of PCB trace: 5inch x 2 pF/
c.Host IC input of 5 pF
d.Total capacitance is 55 pF
a.R = t / 5C = 635.8 ns / (5 x 55 pF)
b.R = 2.3 k Ω
connected together.
Si3232
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