SI3200-GS Silicon Laboratories Inc, SI3200-GS Datasheet - Page 58

• Manufacturer Part Number: SI3200-GS
• Description: IC LINEFEED INTRFC 100V 16SOIC
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3200-GS

• Function: Subscriber Line Interface Concept (SLIC), CODEC
• Interface: GCI, PCM, SPI
• Number Of Circuits: 2
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 110µA
• Power (watts): 941mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Includes: Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Si3220/Si3225
Two-Wire Impedance Synthesis
Two-wire impedance synthesis is performed on-chip to
optimally match the output impedance of the Dual
ProSLIC to the impedance of the subscriber loop to
minimize the receive path signal reflected back onto the
transmit path. The Dual ProSLIC chipset provides on-
chip
synthesis to meet return loss requirements against
virtually any global two-wire impedance requirement.
Refer to “AN196: Dual ProSLIC Digital Impedance
Synthesis”
impedance synthesis initialization and control. Real and
complex two-wire impedances are realized by a
programmable digital filter block. (See Z
in Figure 11 on page 24.)
The two-wire impedance is programmed by loading the
desired real or complex impedance value into the
Si322X Coefficient Generator software in the format R
+ R
calculates the appropriate hex coefficients and loads
them
(registers 33–52). The two-wire impedance can be set
to any real or complex value within the boundaries set in
Table 33. The actual impedance presented to the
subscriber loop varies with series impedance from
protection devices placed between the Dual ProSLIC
chipset outputs and the TIP/RING pair according to the
following equation:
58
Desired
Configuration
R
R
R
Figure 33. Two-Wire Impedance Synthesis
S
S
S
P
only
+ C
+ R
||C
digitally-programmable,
into
P
P
P
, as shown in Figure 33. The software
Table 33. Two-Wire Impedance
||C
P
for
Synthesis Limitations
the
Z
T
R
=
important
S
Configuration
2R
appropriate
PROT
C
Programmable Limits
+
R
P
R
(
P
R
R
S
considerations
S
S
/(R
two-wire
100–1000 Ω
x C
+
S
R
control
P
P
+ R
||
> 0.5 ms
A
C
P
and Z
P
) > 0.1
)
impedance
registers
D
blocks
about
Rev. 1.0
S
Where:
The user must enter the value of R
software so the equalizer block can compensate for
additional series impedance. (See Figure 11 on page
24.) Figure 34 illustrates the simplified two-wire
impedance
resistors, where Z
specific geographical region. The Dual ProSLIC devices
can accomodate up to 50 Ω of series protection
impedance per leg.
The ac impedance generation scheme is comprised of
analog and DSP-based coefficients. To turn off the
analog coefficients (RS, ZP, and ZZ bits in the ZRS and
ZZ registers), the user can simply set the ZSDIS bit of
the ZZ register to 0. To turn off the DSP coefficients
(ZA1H1 through ZB3LO registers), each register must
be loaded with 0x00.
Transhybrid Balance Filter
The Dual ProSLIC devices provide a transhybrid
balance function via a digitally-programmable balance
filter block. (See “H” block in Figure 11.) The Dual
ProSLIC devices implement an 8-tap FIR filter and a
second-order IIR filter, both running at a 16 kHz sample
rate. These two filters combine to form a digital replica
of the reflected signal (echo) from the transmit path
inputs. The user can filter settings on a per-line basis by
loading the desired impedance cancellation coefficients
into the appropriate registers. The Si322xCoefficient
Generator software interface is provided for calculating
Figure 34. Two-Wire Impedance Simplified
Z
TIP/RING pair
R
devices
R
impedance
R
impedance
Z
T
PROT
S
P
L
||C
is the termination impedance presented to the
is the series portion of the synthesized
P
is the series resistance caused by protection
is the parallel portion of the synthesized
Z
RING
T
TIP
circuit
L
R
R
PROT
PROT
is the actual line impedance for the
including
Circuit
external
PROT
ProSLIC
Dual
protection
into the