SI3200-GS Silicon Laboratories Inc, SI3200-GS Datasheet - Page 49

IC LINEFEED INTRFC 100V 16SOIC

SI3200-GS

Manufacturer Part Number
SI3200-GS
Description
IC LINEFEED INTRFC 100V 16SOIC
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3200-GS

Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
GCI, PCM, SPI
Number Of Circuits
2
Voltage - Supply
3.3V, 5V
Current - Supply
110µA
Power (watts)
941mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Includes
Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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To enable unbalanced ringing, set the RINGUNB bit of
the RINGCON register. As with internal balanced
ringing, the unbalanced ringing waveform is generated
by using one of the two on-chip tone generators
provided in the Si3220. The tone generator used to
generate ringing tones is a two-pole resonator with
programmable frequency and amplitude. Since ringing
frequencies are low compared to the audio band
signaling
generated at a 1 kHz rate.
The ringing generator is programmed via the RINGAMP,
RINGFREQ, and RINGPHAS registers. The RINGOF
register is used in to set the dc offset position around
which the RING lead will oscillate. The dc offset is set at
a dc point equal to VCM – (–80 V + VOFF), where
VOFF is the value that is input into the RINGOF RAM
location. Positive VOFF values will cause the dc offset
point to move closer to ground (lower dc offset), and
negative VOFF values will have the opposite effect. The
dc offset can be set to any value; however, the ringing
signal will be clipped digitally if the dc offset is set to a
value that is less than half the ringing amplitude. In
general, the following equation must hold true to ensure
the battery voltage is sufficient to provide the desired
ringing amplitude:
|V
It is possible to create reverse polarity unbalanced
ringing waveforms (the TIP lead oscillates while the
RING lead stays constant) by setting the UNBPOLR bit
of the RINGCON register. In this mode, the polarity of
VOFF must also be reversed (in normal ringing polarity
VOFF is subtracted from –80 V, and in reverse polarity,
ringing VOFF is added to –80 V).
BATR
V
GND
-80V
V
Figure 25. Internal Unbalanced Ringing
BATR
TIP
Si3220
| > |V
V
OFF
frequencies,
RING,PK
V
DC Offset
RING
+ (–80 V + V
V
RING
the
DC Offset
ringing
OFF
V
V
) + V
OVRING
RING
CM
TIP
OVRING
waveform
|
Rev. 1.0
is
Ringing Coefficients
The ringing coefficients are calculated in decimals for
sinusoidal and trapezoidal waveforms. The RINGPHAS
and RINGAMP hex values are decimal to hex
conversions in 16-bit 2’s complement representations
for their respective RAM locations.
To obtain sinusoidal RINGFREQ RAM values, the
RINGFREQ decimal number is converted to a 24-bit 2’s
complement value. The lower 12 bits are placed in
RINGFRLO bits 14:3. RINGFRLO bits 15 and 2:0 are
cleared to 0. The upper 12 bits are set in a similar
manner in RINGFRHI, bits 13:3. RINGFRHI bit 14 is the
sign bit, and RINGFRHI bits 2:0 are cleared to 0.
For
RINGFREQ = 0x7EFD9D are as follows:
RINGFRHI = 0x3F78
RINGFRLO = 0x6CE8
To obtain trapezoidal RINGFREQ RAM values, the
RINGFREQ decimal number is converted to an 8-bit, 2’s
complement value. This value is loaded into RINGFRHI.
RINGFRLO is not used.
Ringing DC Offset Voltage
A dc offset voltage can be added to the Si3220’s ac
ringing waveform by programming the RINGOF RAM
location to the appropriate setting. The value of
RINGOF is calculated as follows:
Figure 26. Trapezoidal Ringing Waveform
example,
V
TIP-RING
V
OFF
RINGOF
the
t
Si3220/Si3225
RISE
=
T = 1/freq
-------------- -
160.8
V
register
OFF
×
2
15
values
time
for
49

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