RC28F128P33BF60A Micron Technology Inc, RC28F128P33BF60A Datasheet - Page 75

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RC28F128P33BF60A

Manufacturer Part Number
RC28F128P33BF60A
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of RC28F128P33BF60A

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Part Number:
RC28F128P33BF60A
Manufacturer:
Micron Technology Inc
Quantity:
10 000
P33-65nm SBC
Figure 32: Buffer Program Flowchart
Datasheet
75
Yes
Address within Device
Clear Status Register
Read Status Register
Read Status Register
Write Confirm D0h
Is WSM Ready?
Another Buffered
Issue Write to Buffer
Write Word Count
Program Complete
Write Buffer Data
Command E8h
Programming?
Supports Buffer
Target Address
Block Address
Check if Desired
Block Address
Block Address
Set Timeout or
Block Address
Loop Counter
Start Address
Full Status
Get Next
X = N?
SR. 7 =?
(note 7)
SR. 7 =
Writes ?
Device
X = 0
50h
Start
1
1 = Yes
Yes
Yes
Yes
No
No
No
Address within buffer range
Abort Bufferred
Buffered Program
Use Single Word
Write Buffer Data
Write to another
Block Address
Programming
Program?
or Count
Expired ?
Timeout
X = X + 1
No
Suspend
Aborted
Program
No
Yes
No
Yes
Yes
Suspend
Program
Loop
Notes:
1. Word count values on DQ
register. Count ranges for this device are N = 0000h to 00FFh.
2. The device outputs the Status Register when read .
3. Write Buffer contents will be programmed at the device start
address or destination flash address .
4. Align the start address on a Write Buffer boundary for
maximum programming performance (i.e., A
address =0).
5. The device aborts the Buffered Program command if the
current address is outside the original block address .
6. The Status register indicates an “improper command
Sequence” if the Buffered Program command is aborted .
Follow this with a Clear Status Register command .
7.
Programming Setup Command (E8h) is issued. CE# or OE#
must be be toggled to update Status Register . Don’t issue the
Read SR command (70h), which would be interpreted by the
internal state machine as Buffer Word Count .
8. Full status check can be done after all erase and write
sequences complete . Write FFh after the last operation to
reset the device to read array mode .
( Notes 1, 2)
( Notes 3, 4)
( Notes 5, 6)
Operation
The device defaults to output SR data after the Buffered
Standby
Standby
(Note 7)
Read
Write
Write
Write
Write
Write
Bus
Read
Command
Confirm
Program
Write to
Buffer
.
0
-DQ
Addr = Start Address
Status register Data
SR. 7 = Valid
Addr = Address within buffer range
CE# and OE # low updates SR
1 = Device WSM is Busy
0 = Device WSM is Ready
N = 0 corresponds to count = 1
1 = WSM Ready
0 = WSM Busy
Data = E8H
Addr = Block Address
Addr = Block Address
Check SR .7
Data = N- 1 = Word Count
Addr = Block Address
Data = Write Buffer Data
Data = Write Buffer Data
Data = D0H
Addr = Block Address
Addr = Block Address
Check SR .7
15
are loaded into the Count
Order Number:208034-04
Comments
.
8
-A
1
of the start
.
Jul 2011

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