ADV3000ASTZ-RL Analog Devices Inc, ADV3000ASTZ-RL Datasheet - Page 17

IC HDMI/DVI SWITCH 3.1 80LQFP

ADV3000ASTZ-RL

Manufacturer Part Number
ADV3000ASTZ-RL
Description
IC HDMI/DVI SWITCH 3.1 80LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV3000ASTZ-RL

Function
Switch
Circuit
1 x 3:1
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
3 V ~ 3.6 V
Current - Supply
110mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SERIAL INTERFACE CONFIGURATION REGISTERS
The serial interface configuration registers can be read and written using the I
The least significant bit of the ADV3000 I
the serial control interface is used, the parallel control interface is disabled until the ADV3000 is reset as described in the Serial Control
Interface section.
Table 5. Serial (I
Name
High Speed
Device
Modes
Auxiliary
Device
Modes
Receiver
Settings
Input
Termination
Pulse 1
Input
Termination
Pulse 2
Receive
Equalizer 1
Receive
Equalizer 2
Transmitter
Settings
HIGH SPEED DEVICE MODES REGISTER
HS_EN: High Speed (TMDS) Channels Enable Bit
Table 6. HS_EN Description
HS_EN
0
1
Description
High speed channels off, low power/standby mode
High speed channels on
Bit 7
0
RX_EQ[7]
0
RX_PT[7]
2
C) Interface Register Map
Bit 6
High
speed
switch
enable
HS_EN
Auxiliary
switch
enable
AUX_EN
RX_PT[6]
0
RX_EQ[6]
0
Source A and Source B : input termination pulse-on-source switch select
Bit 5
High speed switching
0
0
RX_PT[5]
0
RX_EQ[5]
0
Source C: input termination pulse-on-source switch select
Source A and Source B: input equalization level select
2
mode select
C part address is set by tying Pin I2C_ADDR0 to 3.3 V (Logic 1) or 0 V (Logic 0). As soon as
(disconnect termination for a short period of time)
(disconnect termination for a short period of time)
Source C input equalization level select
Bit 4
0
0
RX_PT[4]
0
RX_EQ[4]
0
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Bit 3
0
0
RX_PT[3]
RX_PT[11]
RX_EQ[3]
RX_EQ[11]
TX_PE[1]
High speed output
pre-emphasis level
select
Bit 2
0
0
RX_PT[2]
RX_PT[10]
RX_EQ[2]
RX_EQ[10]
TX_PE[0]
HS_CH[1:0]: High Speed (TMDS) Switch Source Select Bus
Table 7. HS_EN Mapping
HS_CH[1:0]
00
01
10
11
2
C serial control interface, Pin I2C_SDA, and Pin I2C_SCL.
Bit 1
HS_CH[1]
AUX_CH[1]
RX_PT[1]
RX_PT[9]
RX_EQ[1]
RX_EQ[9]
High speed
output
termination
select
TX_PTO
Auxiliary switch source select
O[3:0]
A[3:0]
B[3:0]
C[3:0]
High speed source select
High Speed Source A switched to output
High Speed Source B switched to output
High Speed Source C switched to output
Description
Illegal value
Bit 0
HS_CH[0]
AUX_CH[0]
High speed input
termination select
RX_TO
RX_PT [0]
RX_PT[8]
RX_EQ[0]
RX_EQ[8]
High speed output
current level select
TX_OCL
Addr.
0x00
0x01
0x10
0x11
0x12
0x13
0x14
0x20
ADV3000
Default
0x40
0x40
0x01
0x00
0x00
0x00
0x00
0x03

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