S1D13705F00A200 Epson, S1D13705F00A200 Datasheet - Page 230

• Manufacturer Part Number: S1D13705F00A200
• Manufacturer: Epson

Specifications of S1D13705F00A200

• Operating Supply Voltage (typ): 3.3/5V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Package Type: TQFP
• Pin Count: 80
• Mounting: Surface Mount
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / Rohs Status: Compliant

5 I
5.1 Introduction
5.2 Interfacing to the TMPR3912
5.3 S1D13705 Host Bus Interface
Host Bus Pin Connection
S1D13705F00A APPLICATION NOTES
(X27A-G-004-01)
TMPR3912 M
This application note describes the hardware required to interface the S1D13705 Embedded
Memory LCD Controller and the Toshiba MIPS TMPR3912 Processor. The pairing of these two
devices results in an embedded system offering impressive display capability with very low power
consumption.
The Toshiba MIPS TMPR3912 processor supports up to two PC Card (PCMCIA) slots. It is through
this host bus interface that the S1D13705 connects to the TMPR3912 processor.
The S1D13705 can be successfully interfaced using one of two configurations:
Direct connection to TMPR3912.
System design using one ITE IT8368E PC Card/GPIO buffer chip.
This section is a summary of the host bus interface modes available on the S1D13705 that would be
used to interface to the TMPR3912.
The S1D13705 implements a 16-bit interface to the host microprocessor which may operate in one
of several modes compatible with most of the popular embedded microprocessor families. The
interface modes used for the TMPR3912 are:
• Generic #1 (Chip Select, plus individual Read Enable/Write Enable for each byte).
• Generic #2 (External Chip Select, shared Read/Write Enable for high byte, individual Read/Write
The following table shows the functions of each host bus interface signal.
For configuration details, refer to the “S1D13705 Hardware Functional Specification”, document
number X27A-A-001-02.
X27A-G-004-01
Enable for low byte).
NTERFACING TO THE
Pin Names
S1D13705
AB[15:1]
DB[15:0]
RD/WR#
RESET#
WAIT#
BCLK
WE1#
WE0#
AB0
RD#
CS#
BS#
Table 5-1 Host Bus Interface Pin Mapping
5: INTERFACING TO THE TOSHIBA MIPS TMPR3912 MICROPROCESSOR
ICROPROCESSOR
External Decode
connect to V
Generic #1
RESET#
A[15:1]
D[15:0]
WAIT#
BCLK
WE1#
WE0#
RD1#
RD0#
A0
EPSON
SS
T
connect to IO V
connect to IO V
OSHIBA
External Decode
Generic #2
RESET#
A[15:1]
D[15:0]
WAIT#
BCLK
BHE#
WE#
RD#
A0
DD
DD
MIPS
5-29