LSM303DLHC STMicroelectronics, LSM303DLHC Datasheet - Page 36

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LSM303DLHC

Manufacturer Part Number
LSM303DLHC
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of LSM303DLHC

Lead Free Status / Rohs Status
Compliant

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Register description
7.1.27
7.2
7.2.1
36/42
1 LSB = 1/ODR. TLA7 through TLA0 define the time interval that starts after the first click
detection where the click detection procedure is disabled, in cases where the device is
configured for double click detection.
TIME WINDOW_A (3Dh)
Table 68.
Table 69.
1 LSB = 1/ODR. TW7 through TW0 define the maximum interval of time that can elapse
after the end of the latency interval in which the click detection procedure can start, in cases
where the device is configured for double click detection.
Magnetic field sensing register description
CRA_REG_M (00h)
Table 70.
1. This bit must be set to ‘0’ for correct working of the device
Table 71.
Table 72.
TW7
TW7-TW0
TEMP _EN
DO2 to DO0
TEMP_EN
DO2
0
0
0
0
1
1
TW6
TIME_WINDOW_A register
TIME_WINDOW_A description
CRA_REG_M register
CRA_REG_M description
Data rate configurations
0
Temperature sensor enable.
0: temperature sensor disabled (default), 1: temperature sensor enabled
Data output rate bits. These bits set the rate at which data is written to all three data
output registers (refer to
(1)
DO1
CLICK-CLICK time window
0
0
1
1
0
0
TW5
0
(1)
Doc ID 018771 Rev 1
DO0
0
1
0
1
0
1
TW4
DO2
Table
72). Default value: 100
TW3
DO1
Minimum data output rate (Hz)
TW2
DO0
0.75
1.5
3.0
7.5
15
30
TW1
0
(1)
LSM303DLHC
TW0
0
(1)

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