P80C592FFA/00,518 NXP Semiconductors, P80C592FFA/00,518 Datasheet - Page 83

• Manufacturer Part Number: P80C592FFA/00,518
• Description: IC 80C51 MCU 8BIT ROMLESS 68PLCC
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C592FFA/00,518

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Philips Semiconductors
6. Capacitive loads on Port 0 and Port 2 may cause a HIGH level voltage degradation of ALE and PSEN below 0.9V
7. t
8. AV
9. The differential non-linearity (DL
10. The ADC is monotonic, there are no missing codes.
11. The integral non-linearity (IL
12. The offset error (OS
13. The gain error (G
14. The absolute voltage error (A
15. Not tested during production.
16. Source current for the CTX0, CTX1 outputs together.
1996 Jun 27
8-bit microcontroller with on-chip CAN
(1) Maximum Operating mode (I
(2) Maximum Operating mode (I
(3) Maximum Idle and Sleep mode (I
(4) Maximum Idle and Sleep mode (I
during the address bits are stabilizing.
transfer curve after appropriate adjustment of gain and offset error.
removing gain error, and a straight line which fits the ideal transfer curve. The offset error is constant at every point
of the actual transfer curve.
removing offset error and the straight line which fits the ideal transfer curve. The gain error is constant at every point
on the transfer curve.
of the not calibrated ADC and the ideal transfer curve.
CY
REF+
= 12 t
= 5.12 V; AV
CLK
is the machine cycle time.
e
) is relative difference in percent between the straight line fitting the actual transfer curve after
e
Fig.27 Supply current (I
REF
) is the absolute difference between the straight line which fits the actual transfer curve after
DD
DD
); V
); V
= 0 V; AV
DD(IS)
DD(IS)
handbook, halfpage
e
DD
DD
e
) is the peak difference between the centre of the steps of the actual and the ideal
) is the maximum difference between the centre of the steps of the actual transfer curve
(mA)
I DD
= 5.5 V
= 4.5 V
); V
); V
e
) is the difference between the actual step width and the ideal step width.
DD
DD
50
40
30
20
10
0
DD
= 5.5 V
= 4.5 V
0
= 5.0 V.
DD
4
) as a function of frequency at XTAL1 (f
(1)
(2)
83
8
(3)
f CLK (MHz)
(4)
12
MGA172
16
CLK
).
Product specification
P8xC592
DD