P80C557E4EFB/01,51 NXP Semiconductors, P80C557E4EFB/01,51 Datasheet - Page 19

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P80C557E4EFB/01,51

Manufacturer Part Number
P80C557E4EFB/01,51
Description
IC 80C51 MCU 1024 ROMLESS 80QFP
Manufacturer
NXP Semiconductors
Series
80Cr
Datasheet

Specifications of P80C557E4EFB/01,51

Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
40
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-BQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Quantity
Price
Part Number:
P80C557E4EFB/01,51
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Quantity:
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Part Number:
P80C557E4EFB/01,51
Manufacturer:
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Philips Semiconductors
A/D Input Port Scan-Select Register ADPSS
The Special Function Register ADPSS contains control bits to select
the analog input channel(s) to be scanned for A/D conversion. The
reset value of ADPSS is (00000000). Its hardware address is E7H.
ADPSS is not bit addressable.
If all bits are ‘0’ then no A/D conversion can be started. If ADPSS is
written while an A/D conversion is in progress (ADSST in the
ADCON register is ‘1’) then the autoscan loop with the previous
selected analog inputs is completed first. The next autoscan loop is
performed with the new selected analog inputs.
A/D Result Registers ADRSLn and ADRSH:
The binary result code of A/D conversions is accessed by these
Special Function Registers. The result SFR are read only registers.
The read value after reset is indeterminate. Their data are not
affected by chip reset. They are not bit addressable.
There are 8 Special Function Registers ADRSLn
(ADRSL0...ADRSL7) – A/D Result Low byte – and one general SFR
ADRSH – A/D Result High byte – . Each of ADRSLn is associated
with the coincidently indexed analog input channel ADCn
(ADC0/P5.0...ADC7/P5.7). Reading an ADRSLn register by
software copies at the same time the two highest bits of the 10-bit
conversion result into two latches, thus preserving them until the
next read of any ADRSLn register. These two latches form bit
positions 0 and 1 of SFR ADRSH, the upper 6 bits of ADRSH are
always read as ’0’.
Thus it is ensured to get the 10-bit result of the same single A/D
conversion by reading any register ADRSLn first and after it the
register ADRSH.
1999 Mar 02
Single-chip 8-bit microcontroller
(n: 0...7)
ADPSS7–0
ADRSLn
ADRSH
ADPSS (E7H)
For each individual bit position:
ADRSn.7
ADPSS7
0
7
7
7
ADRSn.6
ADPSS6
Figure 16. A/D input port scan-select register.
0
6
6
6
Figure 17.
ADRSn.5
ADPSS5
0
5
5
5
0
1
A/D Result Registers.
= The corresponding analog input is skipped in the auto-scan loop.
= The corresponding analog input is included in the auto-scan loop.
ADRSn.4
ADPSS4
19
4
4
4
0
P83C557E4/P80C557E4/P89C557E4
ADRSn.3
ADPSS3
3
3
0
3
ADRSn.2
ADPSS2
0
2
2
2
ADRSn.9
ADRSn.1
ADPSS1
1
1
1
Product specification
ADRSn.0
ADRSn.8
ADPSS0
0
0
0

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