LPC1853FET256,551 NXP Semiconductors, LPC1853FET256,551 Datasheet - Page 25
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LPC1853FET256,551
Manufacturer Part Number
LPC1853FET256,551
Description
IC MCU 32BIT 512KB FLASH 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1853FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
Table 3.
LPC1850_30_20_10
Objective data sheet
Symbol
PE_15
PF_0
PF_1
PF_2
PF_3
PF_4
PF_5
PF_6
PF_7
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
Pin description
E13
D12
E11
D11
E10
D10
E9
E7
B7
…continued
Reset
state
[1]
I; PU
I;IA
I; PU
I; PU
I; PU
I;IA
I; PU
I; PU
I; PU
Type Description
-
O
I/O
O
I/O
-
-
-
-
-
I/O
-
-
O
I/O
-
-
I
I/O
-
I/O
I
O
-
-
I/O
I/O
O
-
I/O
I/O
O
-
I/O
I/O
O
All information provided in this document is subject to legal disclaimers.
n.c.
CTOUT_0 — SCT output 0. Match output 0 of timer 0.
I2C1_SCL — I
pad).
EXTBUS_CKEOUT3 — SDRAM clock enable 3.
SSP0_SCK — Serial clock for SSP0.
n.c.
n.c.
n.c.
n.c.
n.c.
SSP0_SSEL — Slave Select for SSP0.
n.c.
n.c.
U3_TXD — Transmitter output for USART3.
SSP0_MISO — Master In Slave Out for SSP0.
n.c.
n.c.
U3_RXD — Receiver input for USART3.
SSP0_MOSI — Master Out Slave in for SSP0.
n.c.
SSP1_SCK — Serial clock for SSP1.
GP_CLKIN — General purpose clock input to the CGU.
TRACECLK — Trace clock.
n.c.
n.c.
U3_UCLK — Serial clock input/output for USART3 in synchronous mode.
SSP1_SSEL — Slave Select for SSP1.
TRACEDATA[0] — Trace data, bit 0.
n.c.
U3_DIR — RS-485/EIA-485 output enable/direction control for USART3.
SSP1_MISO — Master In Slave Out for SSP1.
TRACEDATA[1] — Trace data, bit 1.
n.c.
U3_BAUD — <tbd> for USART3.
SSP1_MOSI — Master Out Slave in for SSP1.
TRACEDATA[2] — Trace data, bit 2.
Rev. 1.2 — 17 February 2011
2
C1 clock input/output (this pin does not use a specialized I
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
© NXP B.V. 2011. All rights reserved.
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