LPC1810FET100,551 NXP Semiconductors, LPC1810FET100,551 Datasheet - Page 19
LPC1810FET100,551
Manufacturer Part Number
LPC1810FET100,551
Description
IC MCU 32BIT 136KB FLSH 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1810FET100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
Table 3.
LPC1850_30_20_10
Objective data sheet
Symbol
PB_0
PB_1
PB_2
PB_3
PB_4
PB_5
PB_6
PC_0
PC_1
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
Pin description
B15
A14
B12
A13
B11
A12
A6
D4
E4
…continued
Reset
state
[1]
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
Type Description
-
O
O
-
-
I
O
-
-
I/O
O
-
-
I/O
O
-
-
I/O
O
-
-
I/O
O
-
-
I/O
O
-
I/O
I
-
I/O
I/O
O
I
O
All information provided in this document is subject to legal disclaimers.
n.c.
CTOUT_10 — SCT output 10. Match output 2 of timer 2.
LCDVD23 — LCD data.
n.c.
n.c.
USB1_ULPI_DIR — ULPI link DIR signal. Controls the ULP data line
direction.
LCDVD22 — LCD data.
n.c.
n.c.
USB1_ULPI_D7 — ULPI link bidirectional data line 7.
LCDVD21 — LCD data.
n.c.
n.c.
USB1_ULPI_D6 — ULPI link bidirectional data line 6.
LCDVD20 — LCD data.
n.c.
n.c.
USB1_ULPI_D5 — ULPI link bidirectional data line 5.
LCDVD15 — LCD data.
n.c.
n.c.
USB1_ULPI_D4 — ULPI link bidirectional data line 4.
LCDVD14 — LCD data.
n.c.
n.c.
USB1_ULPI_D3 — ULPI link bidirectional data line 3.
LCDVD13 — LCD data.
n.c.
ENET_RX_CLK — Ethernet Receive Clock (MII interface).
USB1_ULPI_CLK — ULPI link CLK signal. 60 MHz clock generated by the
PHY.
n.c.
SDIO_CLK — SD/MMC card clock.
USB1_ULPI_D7 — ULPI link bidirectional data line 7.
SDIO_VOLT0 — SD/MMC bus voltage select output 0.
U1_RI — Ring Indicator input for UART 1.
ENET_MDC — Ethernet MIIM clock.
Rev. 1.2 — 17 February 2011
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
© NXP B.V. 2011. All rights reserved.
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