ST52T440F3M6 STMicroelectronics, ST52T440F3M6 Datasheet - Page 55

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ST52T440F3M6

Manufacturer Part Number
ST52T440F3M6
Description
MCU 8-Bit ST52 CISC 8KB EPROM 5V 20-Pin SO
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST52T440F3M6

Package
20SO
Family Name
ST52
Maximum Speed
20 MHz
Ram Size
256 Byte
Program Memory Size
8 KB
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
13
On-chip Adc
6-chx12-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
1

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0
8.2 Register Description
WDT Timeout period can be set by setting the first
4 bits of REG_CONF2: this allows 16 different val-
ues of WDT Clock pulse number to be defined.
The WDT CLK is derived from the Master Clock
divided by 500. Timeout is then obtained by multi-
plying the WDT CLK period for the number of
pulses
REG_CONF2. Table 8.4 illustrates the pulse
length for typical values of Master Clock.
Table 8.3 illustrates the timeout WDT values when
Master Clock is 5 MHz.
Table 8.2 WDT REG_CONF2
4-7
Bit
0
1
2
3
Reset Configuration ‘0000’
D(3:0)
Name
defined
NC
Value
0000
0001
0010
0100
0101
1000
1001
1010
0011
0110
0111
1011
1100
1101
1110
1111
x
in
configuration
Timeout Values (WDT
CLK pulses)
Not Used
1250
1875
2500
3125
3750
4375
5000
5625
6250
6875
7500
8125
8750
9375
625
1
register
Table 8.3 Timeout Values with CLKM=5 MHz
Table 8.4 Typical WDT CLK PERIOD
MASTER CLK
Bit
4-7
0
1
2
3
Reset Configuration ‘0000’
(MHz)
10
20
4
5
8
D(3:0)
Name
NC
ST52T400/T440/E440/T441
WDT CLK
Value
0000
0001
0010
0100
0101
1000
1001
1010
0011
0110
0111
1011
1100
1101
1110
1111
(KHz)
x
10
16
20
40
8
Timeout Values
Not Used
PERIOD (ms)
187.5
312.5
437.5
562.5
687.5
812.5
937.5
WDT CLK
62.5
125
250
375
500
625
750
875
0.1
0.0625
0.125
0.025
0.05
0.1
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