XC3190A-4PQ160C Xilinx Inc, XC3190A-4PQ160C Datasheet - Page 16
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XC3190A-4PQ160C
Manufacturer Part Number
XC3190A-4PQ160C
Description
FPGA XC3100A Family 6K Gates 320 Cells 227MHz CMOS Technology 5V 160-Pin PQFP
Manufacturer
Xilinx Inc
Datasheet
1.XC3190A-4PQ160C.pdf
(76 pages)
Specifications of XC3190A-4PQ160C
Package
160PQFP
Family Name
XC3100A
Device Logic Units
320
Device System Gates
6000
Number Of Registers
928
Maximum Internal Frequency
227 MHz
Typical Operating Supply Voltage
5 V
Maximum Number Of User I/os
138
Ram Bits
64160
Re-programmability Support
Yes
Case
QFP160
Dc
98+
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XC3000 Series Field Programmable Gate Arrays
Crystal Oscillator
Figure 18
inverting amplifier that may be used to implement an
on-chip crystal oscillator. It is associated with the auxiliary
buffer in the lower right corner of the die. When the oscilla-
tor is configured and connected as a signal source, two
special user IOBs are also configured to connect the oscil-
lator amplifier with external crystal oscillator components
as shown in
assure symmetry. The oscillator circuit becomes active
early in the configuration process to allow the oscillator to
stabilize. Actual internal connection is delayed until com-
pletion of configuration. In
R1, between the output and input, biases the amplifier at
threshold. The inversion of the amplifier, together with the
R-C networks and an AT-cut series resonant crystal, pro-
duce the 360-degree phase shift of the Pierce oscillator. A
7-18
Figure 19: Crystal Oscillator Inverter. When activated, and by selecting an output network for its buffer, the crystal
oscillator inverter uses two unconfigured package pins and external components to implement an oscillator. An optional
divide-by-two mode is available to assure symmetry.
XTAL 1 (OUT)
XTAL 2 (IN)
Suggested Component Values
C1, C2
also shows the location of an internal high speed
R1
R2
Y1
Figure
0.5 – 1 M
0 – 1 k
(may be required for low frequency, phase
shift and/or compensation level for crystal Q)
10 – 40 pF
1 – 20 MHz AT-cut parallel resonant
44 PIN
PLCC
19. A divide by two option is available to
30
26
68 PIN
PLCC
Figure 19
47
43
D
PLCC
57
53
Clock Buffer
the feedback resistor
Q
84 PIN
Alternate
PGA
J11
L11
CQFP
67
61
100 PIN
XTAL2
PQFP
(IN)
82
76
series resistor R2 may be included to add to the amplifier
output impedance when needed for phase-shift control,
crystal resistance matching, or to limit the amplifier input
swing to control clipping at large amplitudes. Excess feed-
back voltage may be corrected by the ratio of C2/C1. The
amplifier is designed to be used from 1 MHz to about
one-half the specified CLB toggle frequency. Use at fre-
quencies below 1 MHz may require individual characteriza-
tion with respect to a series resistance. Crystal oscillators
above 20 MHz generally require a crystal which operates in
a third overtone mode, where the fundamental frequency
must be suppressed by an inductor across C2, turning this
parallel resonant circuit to double the fundamental crystal
frequency, i.e., 2/3 of the desired third harmonic frequency
network. When the oscillator inverter is not used, these
IOBs and their package pins are available for general user
I/O.
132 PIN
C1
PGA
M13
P13
160 PIN
Y1
PQFP
82
76
164 PIN
XTAL1
CQFP
105
99
Internal
C2
November 9, 1998 (Version 3.1)
175 PIN
PGA
P15
T14
External
R2
R1
176 PIN
TQFP
91
85
208 PIN
PQFP
110
100
X7064
R